NVT2006BS Datasheet, PDF (1/33 Pages) NXP Semiconductors – Bidirectional voltage-level translator for open-drain and push-pull applications

NVT2003/04/06
Bidirectional voltage-level translator for open-drain and
push-pull applications
Rev. 5 — 19 February 2014
Product data sheet
1. General description
The NVT2003/04/06 is a family of bidirectional voltage level translators operational from
1.0 V to 3.6 V (V_ref(A)) and 1.8 V to 5.5 V (V_ref(B)), which allow bidirectional voltage
translations between 1.0 V and 5 V without the need for a direction pin in open-drain or
push-pull applications. Bit widths ranging from 3-bit to 6-bit are offered for level translation
application with transmission speeds < 33 MHz for an open-drain system with a 50 pF
capacitance and a pull-up of 197 .
When the An or Bn port is LOW, the clamp is in the ON-state and a low resistance
connection exists between the An and Bn ports. The low ON-state resistance (R_on) of the
switch allows connections to be made with minimal propagation delay. Assuming the
higher voltage is on the Bn port when the Bn port is HIGH, the voltage on the An port is
limited to the voltage set by VREFA. When the An port is HIGH, the Bn port is pulled to the
drain pull-up supply voltage (V_pu(D)) by the pull-up resistors. This functionality allows a
seamless translation between higher and lower voltages selected by the user without the
need for directional control.
When EN is HIGH, the translator switch is on, and the An I/O are connected to the Bn I/O,
respectively, allowing bidirectional data flow between ports. When EN is LOW, the
translator switch is off, and a high-impedance state exists between ports. The EN input
circuit is designed to be supplied by V_ref(B). To ensure the high-impedance state during
power-up or power-down, EN must be LOW.
All channels have the same electrical characteristics and there is minimal deviation from
one output to another in voltage or propagation delay. This is a benefit over discrete
transistor voltage translation solutions, since the fabrication of the switch is symmetrical.
The translator provides excellent ESD protection to lower voltage devices, and at the
same time protects less ESD-resistant devices.
2. Features and benefits
 Provides bidirectional voltage translation with no direction pin
 Less than 1.5 ns maximum propagation delay
 Allows voltage level translation between:
 1.0 V V_ref(A) and 1.8 V, 2.5 V, 3.3 V or 5 V V_ref(B)
 1.2 V V_ref(A) and 1.8 V, 2.5 V, 3.3 V or 5 V V_ref(B)
 1.8 V V_ref(A) and 3.3 V or 5 V V_ref(B)
 2.5 V V_ref(A) and 5 V V_ref(B)
 3.3 V V_ref(A) and 5 V V_ref(B)