MB2373 Datasheet, PDF (1/11 Pages) NXP Semiconductors – Dual octal transparent latch 3-State

Philips Semiconductors Advanced BiCMOS Products
Dual octal transparent latch (3-State)
Product specification
MB2373
FEATURES
• 16-bit transparent latch
• Multiple V_CC and GND pins minimize
switching noise
• Power-up 3-State
• Live insertion/extraction permitted
• Power-up reset
• 3-State output buffers
• Output capability: +64mA/–32mA
• Latch-up protection exceeds 500mA per
JEDEC JC40.2 Std 17
• ESD protection exceeds 2000V per MIL
STD 883 Method 3015 and 200V per
Machine Model
DESCRIPTION
The MB2373 high-performance BiCMOS
device combines low static and dynamic
power dissipation with high speed and high
output drive.
The MB2373 device is a dual octal
transparent latch coupled to two sets of eight
3-State output buffers. The two sections of
the device are controlled independently by
Enable (nE) and Output Enable (nOE) control
gates.
The data on each set of D inputs are
transferred to the latch outputs when the
Latch Enable (nE) input is High. The latch
remains transparent to the data inputs while
nE is High, and stores the data that is present
one setup time before the High-to-Low
enable transition.
The 3-State output buffers are designed to
drive heavily loaded 3-State buses, MOS
memories, or MOS microprocessors. Each
active-Low Output Enable (nOE) controls
eight 3-State buffers independent of the latch
operation.
When nOE is Low, the latched or transparent
data appears at the outputs. When nOE is
High, the outputs are in the High–impedance
“OFF” state, which means they will neither
drive nor load the bus.
QUICK REFERENCE DATA
SYMBOL
PARAMETER
CONDITIONS
T_amb = 25°C; GND = 0V
TYPICAL
UNIT
t_PLH
Propagation delay
t_PHL
Dn to Qn
C_L = 50pF; V_CC = 5V
2.9
ns
C_IN
Input capacitance
V_I = 0V or V_CC
4
pF
C_OUT
Output capacitance
V_O = 0V or V_CC; 3-State
7
pF
I_CCZ
Total supply current
Outputs disabled; V_CC = 5.5V
500
nA
ORDERING INFORMATION
PACKAGES
52–pin plastic Quad Flat Pack
TEMPERATURE RANGE
–40°C to +85°C
ORDER CODE
MB2373BB
DRAWING NUMBER
1418B
PIN CONFIGURATION
LOGIC SYMBOL
V_CC ¹
1Q4 2
1Q5 3
È_{GND 4}
ÈÈ_{1Q6 5}
1Q7 6
GND 7
2Q0 8
2Q1 9
GND 10
2Q2 11
2Q3 12
V_CC ¹³
52 51 50 49 48 47 46 45 44 43 42 41 40
MB2373
52–pin PQFP
39 _VCC
38 1D4
37 1D5
È_{36 GND}
ÈÈ_{35 1D6}
34 1D7
33 GND
32 2D0
31 2D1
30 GND
29 2D2
28 2D3
27 _VCC
14 15 16 17 18 19 20 21 22 23 24 25 26
47 45
19 21
48
1Q0 ^1OE
1E
1D0
44 8
2Q0 ^2OE
2E
2D0
32
49
1Q1
1D1
43 9
2Q1
2D21
31
51
1Q2
1D2
41 11
2Q2
2D2
29
52
1Q3
1D3
40 12
2Q3
2D3
28
2
1Q4
1D4
38 14
2Q4
2D4
26
3
1Q5
1D5
37 15
2Q5
2D5
25
5
1Q6
1D6
35 17
2Q6
2D6
23
6
1Q7
1D7
34 18
2Q7
2D7
22
August 23, 1993
1
853-1669 10587