BUK127-50GT Datasheet, PDF (1/7 Pages) NXP Semiconductors – PowerMOS transistor Logic level TOPFET

Philips Semiconductors
PowerMOS transistor
Logic level TOPFET
Product specification
BUK127-50GT
DESCRIPTION
Monolithic temperature and
overload protected logic level power
MOSFET in TOPFET2 technology
assembled in a 3 pin surface mount
plastic package.
APPLICATIONS
General purpose switch for driving
lamps
motors
solenoids
heaters
in automotive systems and other
applications.
QUICK REFERENCE DATA
SYMBOL PARAMETER
V_DS
Continuous drain source voltage
I_D
Continuous drain current
P_D
Total power dissipation
T_j
R_DS(ON)
Continuous junction temperature
Drain-source on-state resistance
FEATURES
TrenchMOS output stage
Current trip protection
Overload protection
Overtemperature protection
Protection latched reset by input
5 V logic compatible input level
Control of output stage
and supply of overload
protection circuits
derived from input
Low operating input current
permits direct drive by
micro-controller
ESD protection on all pins
Overvoltage clamping for turn
off of inductive loads
FUNCTIONAL BLOCK DIAGRAM
INPUT
O/V
CLAMP
RIG
LOGIC AND
PROTECTION
MAX.
50
2.1
1.8
150
200
UNIT
V
A
W
˚C
mΩ
DRAIN
POWER
MOSFET
SOURCE
PINNING - SOT223
PIN
DESCRIPTION
1 input
2 drain
3 source
4 drain (tab)
Fig.1. Elements of the TOPFET.
PIN CONFIGURATION
4
SYMBOL
D
TOPFET
I
P
1
2
3
S
December 2001
1
Rev 2.000