BUK107-50DS Datasheet, PDF (1/9 Pages) NXP Semiconductors – PowerMOS transistor Logic level TOPFET

Philips Semiconductors
PowerMOS transistor
Logic level TOPFET
Product specification
BUK107-50DS
DESCRIPTION
Monolithic overload protected logic
level power MOSFET in a surface
mount plastic envelope, intended as
a general purpose switch for
automotive systems and other
applications.
APPLICATIONS
General controller for driving
lamps
small motors
solenoids
QUICK REFERENCE DATA
SYMBOL PARAMETER
V_DS
Continuous drain source voltage
I_D
Continuous drain current
P_D
Total power dissipation
T_j
R_DS(ON)
Continuous junction temperature
Drain-source on-state resistance
FEATURES
Vertical power DMOS output
stage
Overload protected up to
85˚C ambient
Overload protection by current
limiting and overtemperature
sensing
Latched overload protection
reset by input
Input clamping suitable for
pull-up resistor drive circuit
Control of power MOSFET
and supply of overload
protection circuits
derived from input
ESD protection on all pins
Overvoltage clamping for turn
off of inductive loads
FUNCTIONAL BLOCK DIAGRAM
INPUT
O/V
CLAMP
RIG
LOGIC AND
PROTECTION
MAX.
50
0.7
1.8
150
175
UNIT
V
A
W
˚C
mΩ
DRAIN
POWER
MOSFET
SOURCE
PINNING - SOT223
PIN
DESCRIPTION
1 input
2 drain
3 source
4 drain (tab)
Fig.1. Elements of the TOPFET.
PIN CONFIGURATION
SYMBOL
4
D
TOPFET
I
P
1
2
3
S
March 1997
1
Rev 1.200