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BUJ205A Datasheet, PDF (1/4 Pages) NXP Semiconductors – Silicon Diffused Power Transistor
Philips Semiconductors
Silicon Diffused Power Transistor
Objective specification
BUJ205A
GENERAL DESCRIPTION
High-voltage, high-speed planar-passivated npn power switching transistor in TO220AB envelope intended for use
in high frequency electronic lighting ballast applications, converters, inverters, switching regulators, motor control
systems, etc.
QUICK REFERENCE DATA
SYMBOL
VCESM
VCBO
VCEO
IC
ICM
Ptot
VCEsat
tf
PARAMETER
Collector-emitter voltage peak value
Collector-Base voltage (open emitter)
Collector-emitter voltage (open base)
Collector current (DC)
Collector current peak value
Total power dissipation
Collector-emitter saturation voltage
Fall time
CONDITIONS
VBE = 0 V
Tmb ≤ 25 ˚C
IC = 5.0 A;IB = 1.0 A
Ic=6A,IB1=1.2A
TYP.
-
-
-
-
-
-
-
-
MAX.
850
850
450
8
12
125
1.5
300
UNIT
V
V
V
A
A
W
V
µs
PINNING - TO220AB
PIN
DESCRIPTION
1 base
2 collector
3 emitter
tab collector
PIN CONFIGURATION
tab
1 23
SYMBOL
c
b
e
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum Rating System (IEC 134)
SYMBOL PARAMETER
CONDITIONS
VCESM
VCEO
VCBO
IC
ICM
IB
IBM
Ptot
Tstg
Tj
Collector to emitter voltage
Collector to emitter voltage (open base)
Collector to base voltage (open emitter)
Collector current (DC)
Collector current peak value
Base current (DC)
Base current peak value
Total power dissipation
Storage temperature
Junction temperature
VBE = 0 V
Tmb ≤ 25 ˚C
THERMAL RESISTANCES
SYMBOL
Rth j-mb
Rth j-a
PARAMETER
Junction to mounting base
Junction to ambient
CONDITIONS
in free air
MIN.
-
-
-
-
-
-
-
-
-65
-
MAX.
850
450
850
8
12
4
6
125
150
150
UNIT
V
V
V
A
A
A
A
W
˚C
˚C
TYP.
-
60
MAX.
1
-
UNIT
K/W
K/W
August 1998
1
Rev 1.000