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ADC1112D125 Datasheet, PDF (1/41 Pages) NXP Semiconductors – Dual 11-bit ADC; CMOS or LVDS DDR digital outputs | |||
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ADC1112D125
Dual 11-bit ADC; CMOS or LVDS DDR digital outputs
Rev. 2 â 3 March 2011
Product data sheet
1. General description
The ADC1112D125 is a dual channel 11-bit Analog-to-Digital Converter (ADC) optimized
for high dynamic performance and low power consumption. Pipelined architecture and
output error correction ensure the ADC1112D125 is accurate enough to guarantee zero
missing codes over the entire operating range. Supplied from a single 3 V source, it can
handle output logic levels from 1.8 V to 3.3 V in Complementary Metal Oxide
Semiconductor (CMOS) mode, because of a separate digital output supply. It supports the
Low Voltage Differential Signalling (LVDS) Double Data Rate (DDR) output standard. An
integrated Serial Peripheral Interface (SPI) allows the user to easily configure the ADC.
The device also includes a programmable full-scale SPI to allow a flexible input voltage
range of 1 V (p-p) to 2 V (p-p). With excellent dynamic performance from the baseband to
input frequencies of 170 MHz or more, the ADC1112D125 is ideal for use in
communications, imaging and medical applications.
2. Features and benefits
 SNR, 66.2 dBFS
 SFDR, 87 dBc
 Sample rate up to 125 Msps
 Clock input divided by 2 to reduce jitter
contribution
 Single 3 V supply
 Flexible input voltage range: 1 V (p-p)
to 2 V (p-p)
 CMOS or LVDS DDR digital outputs
 Power-down and Sleep modes
 Input bandwidth, 600 MHz
 Power dissipation, 1230 mW
 Serial Peripheral Interface (SPI)
 Duty cycle stabilizer
 Fast OuT-of-Range (OTR) detection
 Pin and software compatible with
ADC1412D series and ADC1212D
series.
 Offset binary, twoâs complement, gray
code
 HVQFN64 package
3. Applications
 Wireless and wired broadband
communications
 Spectral analysis
 Ultrasound equipment
 Portable instrumentation
 Imaging systems
 Software defined radio
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