74LVC1G58 Datasheet, PDF (1/18 Pages) NXP Semiconductors – Low-power configurable multiple function gate

74LVC1G58
Low-power configurable multiple function gate
Rev. 01 — 15 September 2004
Product data sheet
1. General description
The 74LVC1G58 is a high-performance, low-power, low-voltage, Si-gate CMOS device,
superior to most advanced CMOS compatible TTL families.
Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of this
device in a mixed 3.3 V and 5 V environment.
This device is fully specified for partial power-down applications using I_off. The I_off circuitry
disables the output, preventing the damaging backflow current through the device when it
is powered down.
The 74LVC1G58 provides configurable multiple functions. The output state is determined
by eight patterns of 3-bit input. The user can choose the logic functions AND, OR, NAND,
NOR, XOR, inverter and buffer. All inputs can be connected to V_CC or GND.
The three inputs (A, B and C) are capable of transforming slowly changing input signals
into sharply defined, jitter-free output signals.
The gate switches at different points for positive and negative-going signals. The
difference between the positive voltage V_T+ and the negative voltage V_T− is defined as the
hysteresis voltage V_H.
2. Features
s Wide supply voltage range from 1.65 V to 5.5 V
s 5 V tolerant input/output for interfacing with 5 V logic
s High noise immunity
s Complies with JEDEC standard:
x JESD8-7 (1.65 V to 1.95 V)
x JESD8-5 (2.3 V to 2.7 V)
x JESD8B/JESD36 (2.7 V to 3.6 V).
s ±24 mA output drive (V_CC = 3.0 V)
s ESD protection:
x HBM EIA/JESD22-A114-B exceeds 2000 V
x MM EIA/JESD22-A115-A exceeds 200 V.
s CMOS low power consumption
s Latch-up performance exceeds 250 mA
s Direct interface with TTL levels
s Inputs accept voltages up to 5 V
s Multiple package options
s Specified from −40 °C to +85 °C and −40 °C to +125 °C.