74HC244_05 Datasheet, PDF (1/22 Pages) NXP Semiconductors – Octal buffer/line driver; 3-state

74HC244; 74HCT244
Octal buffer/line driver; 3-state
Rev. 03 — 22 December 2005
Product data sheet
1. General description
The 74HC244; 74HCT244 is a high-speed Si-gate CMOS device and is pin compatible
with Low-power Schottky TTL (LSTTL).
The 74HC244; 74HCT244 has octal non-inverting buffer/line drivers with 3-state outputs.
The 3-state outputs are controlled by the output enable inputs 1OE and 2OE. A HIGH on
nOE causes the outputs to assume a high-impedance OFF-state. The 74HC244;
74HCT244 is identical to the 74HC240; 74HCT240 but has non-inverting outputs.
2. Features
s Octal bus interface
s Non-inverting 3-state outputs
s Complies with JEDEC standard no. 7A
s ESD protection:
x HBM EIA/JESD22-A114-C exceeds 2000 V
x MM EIA/JESD22-A115-A exceeds 200 V
s Multiple package options
s Specified from −40 °C to +85 °C and from −40 °C to +125 °C
3. Quick reference data
Table 1: Quick reference data
GND = 0 V; T_amb = 25 °C; t_r = t_f = 6 ns
Symbol Parameter
Conditions
Min Typ Max Unit
74HC244
t_PHL,
t_PLH
propagation delay
nAn to nYn
V_CC = 5 V; C_L = 15 pF
-
9
-
ns
C_i
input capacitance
-
3.5 -
pF
C_PD
power dissipation
per buffer; V_I = GND to ^[1] -
35
-
pF
capacitance
V_CC
74HCT244
t_PHL,
t_PLH
propagation delay
nAn to nYn
V_CC = 5 V; C_L = 15 pF
-
11
-
ns
C_i
input capacitance
-
3.5 -
pF
C_PD
power dissipation
per buffer; V_I = GND to ^[1] -
35
-
pF
capacitance
(V_CC − 1.5 V)
[1] C_PD is used to determine the dynamic power dissipation (P_D in µW):
P_D = C_PD × V_CC2 × f_i × N + ∑(C_L × V_CC2 × f_o) where: