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| 2N5064 Datasheet, PDF (1/4 Pages) NXP Semiconductors – Thyristor sensitive gate | |||
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Philips Semiconductors
Thyristor
sensitive gate
Product specification
2N5064
GENERAL DESCRIPTION
Glass passivated sensitive gate
thyristor in a plastic envelope,
intended for use in general purpose
switching and phase control
applications. This device is intended
to be interfaced directly to
microcontrollers, logic integreated
circuits and other low power gate
trigger circuits.
QUICK REFERENCE DATA
SYMBOL PARAMETER
VDRM,
VRRM
IT(AV)
IT(RMS)
ITSM
Repetitive peak off-state voltages
Average on-state current
RMS on-state current
Non-repetitive peak on-state current
MAX. UNIT
200 V
0.5 A
0.8 A
10 A
PINNING - TO92 variant
PIN
DESCRIPTION
1 anode
2 gate
3 cathode
PIN CONFIGURATION
3 21
SYMBOL
a
k
g
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134).
SYMBOL PARAMETER
CONDITIONS
VDRM, VRRM Repetitive peak off-state
voltages
IT(AV)
IT(RMS)
ITRM
Average on-state current
RMS on-state current
Repetitive peak on-state
current
half sine wave
Tc ⤠67 ËC
Tc ⤠102 ËC
all conduction angles
ITSM
Non-repetitive peak
half sine wave; Ta = 25 ËC prior to surge;
on-state current
t = 8.3 ms
I2t
I2t for fusing
t = 8.3 ms
IGM
VGM
VRGM
PGM
PG(AV)
Tstg
Tj
Peak gate current
Peak gate voltage
Ta = 25ËC, tp = 300µs; f = 120 Hz
Peak reverse gate voltage
Peak gate power
Average gate power
Storage temperature
Ta = 25ËC
Ta = 25ËC, over any 16 ms period
Operating junction
temperature
MIN. MAX. UNIT
- 200 V
- 0.51 A
- 0.255 A
-
0.8 A
-
8
A
-
10
A
-
0.4 A2s
-
1
A
-
5
V
-
5
V
-
0.1 W
- 0.01 W
-65 150 ËC
-65 125 ËC
October 1997
1
Rev 1.200
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