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PT7C433833 Datasheet, PDF (9/17 Pages) Pericom Semiconductor Corporation – Real-time Clock Module (I2C Bus)
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PT7C433833
Real-time Clock Module (I2C Bus)
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Control and status register
Addr.
Description
D7
D6
D5
D4
D3
(hex)
07
Control
(default)
OUT
0
OSF
SQWE
0
1
0
1
1
0
D2
D1
D0
0
RS1
RS0
0
1
1
 OUT
It controls the output level of the SQW/OUT pin when the square wave output is disabled.
OUT
Data
Description
Read / Write
0 When SQWE = 0, SQW/OUT pin output low.
1 When SQWE = 0, SQW/OUT pin output high.
Default
 SQWE (Square Wave Enable)
This bit, when set to logic 1, will enable the oscillator output. The frequency of the square wave output depends upon the value of
the RS0 and RS1 bits. With the square wave output set to 1Hz, the clock registers update on the falling edge of the square wave.
 RS (Rate Select)
These bits control the frequency of the square wave output when the square wave output has been enabled.
RS1, RS0
Data
SQW output freq. (Hz)
00
1
Read / Write
01
4.096k
10
8.192k
11
32.768k
Default
 OSF(Oscillator Stop Flag)
Logic 1 in this bit indicates that the oscillator either is stopped or was stopped for some period of time and may be used to judge
the validity of the clock and calendar data. This bit is set to logic 1 anytime that the oscillator stops. The following are examples of
conditions that can cause the OSF bit to be set:
1) The first time power is applied.
2) The voltage present on VCC and VBAT is insufficient to support oscillation.
3) The /EOSC bit is set to 1, disabling the oscillator.
4) External influences on the crystal (e.g., noise, leakage, etc.).
This bit remains at logic 1 until written to logic 0. This bit can only be written to logic 0. Attempting to write OSF bit to logic 1
leaves the value unchanged.
12-07-0001
PT0321-6 07/04/12
9
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