PT7M6709 Datasheet, PDF (8/12 Pages) Pericom Semiconductor Corporation – Multi-voltage Supervisor

PT7M6709/6714
Multi-voltage Supervisor
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Window Detection
A window detector circuit uses two auxiliary inputs in a configuration such as the one shown in Fig 6. External resistors R1-R4 set
the two threshold voltages (V_TH1 and V_TH4 ) of the window detector circuit. Window width (ΔV_TH ) is the difference between the
threshold voltages.(Fig 7).
Adjustable Input
The PT7M6709 offers several monitor options with adjustable reset thresholds. The PT7M6714 has three monitored inputs with
adjustable thresholds. The threshold voltage at each adjustable IN_(PFI_) input is typically 0.62V. To monitor a voltage>0.62V,
connect a resistor-divider network to the circuit.
V_INTH =0.62V×(R1+R2)/R2 OR R1=R2×(V_INTH /0.62V-1)
Unused Input
The unused inputs (except the adjustable) are internally connected to ground through the lower resistors of the threshold-setting
resistor pairs. The adjustable input, however, must be connected to ground if unused.
Reset Output
The PT7M6714 RESET output asserts low when Vcc drops below its specified threshold or MR asserts low and remains low for
the reset timeout period(>=140ms) after Vcc exceeds its threshold and MR deasserts. The output is open drain with a weak (10μA)
internal pull up to Vcc. For many applications, no external pull up resistor is required to interface with other logic devices. An
external pull resistor to any voltage from 0V to 5.5V overdrives the internal pull up if interfacing to different logic supply voltage.
Internal circuitry prevents reverse current flow from the external pullup voltage to Vcc.
Manual Reset Input
A logic low on MR asserts RESET low. RESET remains asserted while MR is low, and during the reset timeout
Period (140ms min) after MR returns high. The MR input has an internal 20kΩ pullup resistor to Vcc, so it can be left open if
unused. Drive MR with TTL or CMOS-logic levels, or with open-drain/collector outputs. Connect a normally open momentary
switch from MR to GND to create a manual reset function; external debounce circuitry is not required. If MR is driven from long
cables or if the device is used in a noisy environment, connecting a 0.1μF capacitor from MR to GND provides additional noise
immunity.
Resetting the μP from a second voltage (PT7M6714)
The PT7M6714 can be configured to assert a reset from a second voltage by connecting the power-fail output to manual reset. As
the V_{PFI_} falls below its threshold, PFO goes low and asserts the reset output for the reset timeout period after the manual reset
input is deasserted. (Please See Typical Application Circuit.)
Power-Supply Bypassing and Grounding
The PT7M6709/ PT7M6714 operate from a single 2.0V to 5.5V supply. In noise applications, bypass Vcc with a 0.1μF capacitor
as close to Vcc as possible.
12-07-0002
PT0235-2
07/05/12
8