PI6ULS5V9627A Datasheet, PDF (7/10 Pages) Pericom Semiconductor Corporation – 4 Channel Level Translating Fast-Mode Plus I2C-bus/SMbus Repeater

PI6ULS5V9627A
4 Channel Level Translating
Fast-Mode Plus I²C-bus/SMbus Repeater
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Application Information
A typical application is shown in Figure 6. In this example, the system master is running on a 3.3V I²C-bus while the slave is
connected to a 1.2V bus. Both buses run at 1MHz. Master devices can be placed on either bus.
The PI6ULS5V9627A is 5V tolerant, so it does not require any additional circuitry to translate between 0.6V to 5.5V bus
voltages and 2.2V to 5.5V bus voltages.
Figure 6: Typical Application
When port A of the PI6ULS5V9627A is pulled LOW by a driver on the I²C-bus, a comparator detects the falling edge when
it goes below 0.3V_CC(A) and causes the internal driver on port B to turn on, causing port B to pull down to about 0.5 V. When port
B of the PI6ULS5V9627A falls, first a CMOS hysteresis type input detects the falling edge and causes the internal driver on port
A to turn on and pull the port A pin down to ground. In order to illustrate what would be seen in a typical application, refer to
Figure 9 and Figure 10. If the bus master in Figure 6 were to write to the slave through the PI6ULS5V9627A, waveforms shown
in Figure 9 would be observed on the A bus. This looks like a normal I²C-bus transmission except that the HIGH level may be as
low as 0.6 V, and the turn on and turn off of the acknowledge signals are slightly delayed.
On the B bus side of the PI6ULS5V9627A, the clock and data lines would have a positive offset from ground equal to the
V_OL of the PI6ULS5V9627A. After the eighth clock pulse, the data line will be pulled to the V_OL of the slave device which is very
close to ground in this example. At the end of the acknowledge, the level rises only to the LOW level set by the driver in the
PI6ULS5V9627A for a short delay while the A bus side rises above 0.3V_CC(A) then it continues HIGH. It is important to note that
any arbitration or clock stretching events require that the LOW level on the B bus side at the input of the PI6ULS5V9627A (V_IL)
be at or below 0.4 V to be recognized by the PI6ULS5V9627A and then transmitted to the A bus side.
Multiple PI6ULS5V9627A port A sides can be connected in a star configuration (Figure 7), allowing all nodes to
communicate with each other.
Multiple PI6ULS5V9627As can be connected in series as long as port A is connected to port B (Figure 8). I²C-bus slave
devices can be connected to any of the bus segments. The number of devices that can be connected in series is limited by repeater
delay/time-of-flight considerations on the maximum bus speed requirements.
PI6ULS5V9627A
2014-01-0009
Figure 7: Typical Star Application
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PT0485-1 02/11/14