PI6LC4830 Datasheet, PDF (2/11 Pages) Pericom Semiconductor Corporation – HiFlex Network Clock Generator

Pin Description
Pin Number Pin Name
20, 21, 23, 24, QA0+, QA0-, QA1+,
26, 27
QA1-, QA2+, QA2-
Type
Output (HCSL)
9, 10
REF_Out+, REF_Out- Output (LVPECL)
12
X1
13
X2
6, 7
IN+, IN-
Input
Output
Input (Differential)
11
IN_SEL
Input (LVCMOS)
1
PLL_Byps
Input (LVCMOS)
30, 3
14
5
22, 29
32
19, 25
18
16
17
15
4
28
8
2
31
QA_OE, QB_OE
V_DD_OSC
V_DD_PLL
V_DD_Out
V_DDA_PLL
GND
QA_CMOS
QB_CMOS
V_DD_OutA_SE
V_DD_OutB_SE
QB_DIV2
I_REF
V_DD_REF_OUT
REF_OUT_OE
V_DD
Input (LVCMOS)
Power
Power
Power
Power
Power
Output (LVCMOS)
Output (LVCMOS)
Power
Power
Input (LVCMOS)
Output
Power
Input (LVCMOS)
Power
PI6LC4830
HiFlex^TM Network Clock Generator
Description
100MHz HCSL Outputs
25MHz LVPECL output from fundamental oscillator
core
Crystal input pin
Oscillator output pin
HCSL/LVPECL/LVDS inputs
Low selects X1 and X2, High selects In+, In-. Internal
pull up is 100k Ohms
If Low, output buffers are switched to the PLL. If High,
output buffers are switched to the input mux. Internal
100K-Ohm pulldown.
Low enables outputs, High selects high impedance
mode. Internal 100K-Ohm pulldown
Power for xtal Osc core
Power for digital portion of PLL circuitry
Power for output buffers
Power for analog core of PLL
Ground
100MHz LVCMOS Output
100/50MHz Selectable LVCMOS Output
Bank A LVCMOS Power
Bank B LVCMOS Power
High selects 50MHz, Low selects 100MHz. Internal
100K-Ohm pull-up
External resistor connection for internal current refer-
ence
Power for reference output
Low enables outputs, High selects high impedance
mode. Internal 100K-Ohm pull-down.
Power for Core
12-0238
2
PI6LC4830 Rev B
08/17/12