PI2EQX4401 Datasheet, PDF (2/7 Pages) Pericom Semiconductor Corporation – 2.5Gbps x1 Lane Serial PCI Express Repeater/Equalizer with Clock Buffer

PI2EQX4401
2.5Gbps x1 Lane Serial PCI Express
Repeater/Equalizer with Clock Buffer
Pin Description
Pin #
Pin Name
1, 6, 10, 23, 28
V_DD
2
AI+
3
AI-
4, 9, 20, 25
GND
22
BI+
21
BI-
33, 34
SEL[0:1]_A
13, 14
SEL[0:1]_B
32
SEL[2]_A
15
SEL[2]_B
31
SEL[3]_A
16
SEL[3]_B
27
AO+
26
AO-
7
BO+
8
BO-
30, 29
12
11
17, 18
5
24
19
35, 36
EN_[A,B]
CLKIN-
CLKIN+
OUT+, OUT-
AVDD
AGND
IREF
NC
I/O
PWR
I
I
PWR
I
I
I
I
I
I
I
I
O
O
O
O
I
I
I
O
PWR
PWR
O
N/A
Description
1.8V Supply Voltage
Positive CML Input Channel A with internal 50Ω pull down
Negative CML Input Channel A with internal 50Ω pull down
Supply Ground
Positive CML Input Channel B with internal 50Ω pull down
Negative CML Input Channel B with internal 50Ω pull down
Selection pins for equalizer (see Amplifier Configuration Table)
w/ 50KΩ internal pull up
Selection pins for amplifier (see Amplifier Configuration Table)
w/ 50KΩ internal pull up
Selection pins for De-Emphasis (See De-Emphasis Configuration Table)
w/ 50KΩ internal pull up
Positive CML Output Channel A internal 50Ω pull up during normal operation and
2KΩ pull up otherwise.
Negative CML Output Channel A with internal 50Ω pull up during normal opera-
tion and 2KΩ pull up otherwise.
Positive CML Output Channel B with internal 50Ω pull up during normal operation
and 2KΩ pull up otherwise.
Negative CMLOutput Channel B with internal 50Ω pull up during normal opera-
tion and 2KΩ pull up otherwise.
EN_[A:B] is the enable pin. A LVCMOS high provides normal operation. A LVC-
MOS low selects a low power down mode.
Differential Input Reference Clock
Differential Reference Clock Output
1.8V Analog supply voltage
Analog ground
External 475Ω resistor connection to set the differential output current
No connect pins. For normal operation, leave pins floating
2
PS8777B
02/15/06