PI2EQX4401 Datasheet, PDF (1/7 Pages) Pericom Semiconductor Corporation – 2.5Gbps x1 Lane Serial PCI Express Repeater/Equalizer with Clock Buffer

Features
• One high-speed PCI Express lane
• Adjustable Transmiter De-Emphasis & Amplitude
• Adjustable Receiver Equalization
• One Spread Spectrum Reference Clock Buffer Output
• 100Ω Differential CML I/O’s
• Low Power (100mW per Channel)
• Stand-by Mode – Power Down State
• V_CC Operating Range: 1.8V ±0.1V
• Built in Clock Buffer
• Packaging (Pb-free & Green):
— 36-pad TQFN (ZF36)
Block Diagram
PI2EQX4401
2.5Gbps x1 Lane Serial PCI Express
Repeater/Equalizer with Clock Buffer
Description
Pericom Semiconductor’s PI2EQX4401 is a low power, PCI-
Express compliant signal re-driver. The device provides
programmable equalization, amplification, and de-emphasis
by using 4 select bits, SEL[0:3], to optimize performance
over a variety of physical mediums by reducing Inter-symbol
interference. PI2EQX4401 supports two 100 Differential CML
data I/O’s between the Protocol ASIC to a switch fabric, across
a backplane, or extends the signals across other distant data
pathways on the user’s platform.
The integrated equalization circuitry provides flexibility with
signal integrity of the PCI Express signal before the re-driver.
Whereas the integrated de-emphasis circuitry provides flexibility
with signal integrity of the PCI Express signal after the re-driver.
In addition to providing signal re-conditioning, Pericom’s
PI2EQX4401 also provides power management Stand-by mode
operated by a Bus Enable pin.
Pin Description
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36 35 34 33 32 31 30 29
VDD 1
28 VDD
AI+ 2
27 A0+
AI- 3
GND 4
26 A0-
25 GND
AVDD 5
VDD 6
B0+ 7
GND
24 AGND
23 _VDD
22 BI+
B0- 8
21 BI-
GND 9
20 _GND
VDD 10
19 _IREF
11 12 13 14 15 16 17 18
1
PS8777B
02/15/06