PI3VDP612-A_11 Datasheet, PDF (11/16 Pages) Pericom Semiconductor Corporation – 4-Lane DisplayPort Rev 1.1a Compliant Switch with Triple Control Logic for Fast Switching

PI3VDP612-A
4-Lane DisplayPort™ Rev 1.1a Compliant Switch
with Triple Control Logic for Fast Switching
Switching Characteristics (TA= -40º to +85ºC, VDD = 3.3V±10%)
Parameter
Description
tPZH, tPZL
tPHZ, tPLZ
T_pd
tb-b
tch-ch
Line Enable Time
Line Disable Time
Propagation delay (input pin to output pin)
Bit-to-bit skew within the same differential pair
Channel-to-channel skew
Test Circuit for Electrical Characteristics(1-5)
V_DD
Min.
0.5
0.5
Max.
15.0
15.0
200
7
50
Units
ns
ps
ps
ps
6.0V
Pulse
V_IN
Generator
R_T
D.U.T
V_OUT
200-ohm
4pF
C_L
200-ohm
Notes:
1. C_L = Load capacitance: includes jig and probe capacitance.
2. R_T = Termination resistance: should be equal to Z_OUT of the Pulse Generator
3. Output 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
output 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
4. All input impulses are supplied by generators having the following characteristics: PRR ≤ MHz, Z_O = 50Ω, t_R ≤ 2.5ns, t_F ≤ 2.5ns.
5. The outputs are measured one at a time with one transition per measurement.
Switching Waveforms
SEL
tPZL
Output 1
tPZH
Output 2
V_DD/2
tPLZ
V_DD/2
tPHZ
V_DD/2
V_DD/2
V_OL + 0.3V
V_OH – 0.3V
V_DD
0V
VOH
VOL
VOH
VOL
Voltage Waveforms Enable and Disable Times
Switch Positions
Test
t_PLZ, t_PZL (output on B-side)
t_PHZ, t_PZH (output on B-side)
Prop Delay
Switch
6.0V
GND
Open
11-0103
11
PS9056A
07/12/11