PT7M6315US Datasheet, PDF (1/6 Pages) Pericom Semiconductor Corporation – Supervisory Circuit

PT7M6315US
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Supervisory Circuit
Features
 Highly accurate: 1.5% (25°C)
Description
The series are designed to monitor power supplies in µP
 Detect voltage range: 1.8 to 5V in 100mV ^{and digital systems. It provides excellent circuit}
increments
reliability and low cost by eliminating external
 Operating voltage range: 1.0V ~ 5.5V
 Operating temperature range: -40°C to + 85°C
 Detect voltage temperature characteristics: 2.5% 
TYP
 Output configuration: N-channel open drain
 Three reset timeout period available:
 typical 1.6ms for PT7M6315USxxD1;
 typical 26ms for PT7M6315USxxD2;
 typical 200ms for PT7M6315USxxD3;
 typical 1570ms for PT7M6315USxxD4;
components and adjustments, and a debounced manual
reset input.
This device performs a single function: it asserts a reset
signal whenever the V_CC supply voltage falls below a
preset threshold or whenever manual reset is asserted.
Reset remains asserted for an internally programmed
interval (reset timeout period) after V_CC has risen above
the reset threshold or manual reset is deasserted.
The PT7M6315USxx are open-drain RESET output.
They can be pulled up to a voltage higher than V_CC.
The serials come with factory-trimmed reset threshold
voltages in 100mV increments from 1.8V to 5V. Preset
timeout periods of 200ms (typ.) for PT7M6315USxxD3,
1570ms (typ.) for PT7M6315USxxD4, and 26ms for
PT7M6315USxxD2 are available.
Pin Configuration
PT7M6315USxxD3F/D4F
1 GND _VCC 4
2 RST
MR 3
SOT143-4
Pin Description
Name Type
Description
RST ^{I/O Reset Output: RST is asserted when VCC drops below voltage threshold VTH-. Active low.}
MR _I Manual Reset: A logic low on MR asserts reset. Reset remains asserted as long as MR is low, and for the
reset timeout period (t_RS) after the reset conditions are terminated. Connect to V_CC if not used.
GND P Ground
V_CC P Supply Voltage.
2015-09-0002
PT0197-4 09/15/15
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