PI6C49004 Datasheet, PDF (1/12 Pages) Pericom Semiconductor Corporation – Networking Clock Generator

PI6C49004
Networking Clock Generator
Features
• 3.3V +/-10% Supply Voltage
• Uses 25MHz xtal such as Saronix-eCera™ SRX7278
• Twelve PCIe® 100MHz outputs with optional -0.5% spread
spectrum support
• Two LVCMOS 50MHz outputs that support +/- 10%
frequency margining
• One frequency selectable 33/66/133MHz LVCMOS output
• One 32.256MHz LVCMOS output
• Industrial temperature -40°C to 85°C
• Package: 56-pin TSSOP package
Description
The PI6C49004 is a clock generator device intended for PCIe®/
networking applications. The device includes twelve 100MHz
differential Host Clock Signal Level (HCSL) outputs for PCIe,
two single-ended 50MHz outputs, one single-ended 32.256MHz
output, and one selectable single-ended 33/66/133MHz output.
Using a serially programmable SMBUS interface, the PI6C49004
incorporates spread spectrum modulation on the twelve 100MHz
HCSL PCIe outputs, and independent frequency margining on the
50MHz output, 33.3333MHz and 66.6666MHz clock outputs.
Pin Configuration
Block Diagram
25 MHz
crystal or
clock input
Clock Buffer/
Crystal
Oscillator
VDD
12
SCLK
SDATA
PD_RESET
PLL, Dividers,
Buffers, and
Logic
12
100M_OUT(0-11)
2
50M_OUT(1-2)
33/66/133M_OUT1
32.256M_OUT1
8
GND
ISET
475 Ohms
1%
VDD
1
IREF
2
NC
3
100M_Q11-
4
100M_Q11+
5
100M_Q10-
6
100M_Q10+
7
VDD
8
VDD
9
GND
10
100M_Q9-
11
100M_Q9+
12
100M_Q8-
13
100M_Q8+
14
100M_Q7-
15
100M_Q7+
16
SCLK
17
SDATA
18
GND
19
50M_OUT1
20
50M_OUT2
21
VDD
22
GND
23
VDD
24
32.256M_OUT1
25
GND
26
NC
27
PD_RESET
28
11-0080
09-0098
1
56
GND
55
VDD
54
100M_Q0-
53
100M_Q0+
52
100M_Q1+
51
100M_Q1-
50
VDD
49
GND
48
VDD
47
100M_Q2+
46
100M_Q2-
45
100M_Q3+
44
100M_Q3-
43
100M_Q4+
42
100M_Q4-
41
100M_Q5+
40
100M_Q5-
39
VDD
38
GND
37
VDD
36
100M_Q6+
35
100M_Q6-
34
33/66/133M_OUT1
33
VDD
32
GND
31
VDD
30
X2
29
X1
PS9047A
04/11/11