PE9304 Datasheet, PDF (2/6 Pages) Peregrine Semiconductor Corp. – 1- 7 GHz Low Power CMOS Divide-by-2 Prescaler

Figure 3. Pin Configuration
VDD
1
8 GND
IN
2
DEC
3
PE9304
7 OUT
6 NC
GND 4
5 GND
Table 2. Pin Descriptions
Pin No.
Pin
Name
Description
1
VDD
Power supply pin. Bypassing is required
(eg. 1000pF & 100pF).
2
IN
Input signal pin. Should be coupled with a
capacitor (eg. 2.2pF).
3
DEC
Decoupling Pin. This pin should have two
capacitors in parallel (eg. 1000pf, 10nF)
Ground pin. Ground pattern on the board
4
GND should be as wide as possible to reduce
ground impedance.
5
GND Ground pin.
6
NC
No connection. This pin should be left
open.
Divided frequency output pin. This pin
7
OUT should be coupled with a capacitor
(eg. 2.2pF).
8
GND Ground Pin.
Table 3. Absolute Maximum Ratings
Symbol Parameter/Conditions Min Max Units
VDD
Supply voltage
3.3
V
Pin
Input Power
VIN
Voltage on input
TST
Storage temperature range
+12 dBm
-0.3
VDD
+0.3
V
-65 150 °C
TOP
Operating temperature range -40
85
°C
ESD voltage (Human Body
Model, MIL-STD 883 Method
3015.7)
500
V
VESD
ESD voltage (Machine Model,
JEDEC, JESD22-A114-B)
50
V
ESD voltage (Charged Device
Model, JEDEC, JESD22-
C101)
1000 V
Absolute Maximum Ratings are those values
listed in the above table. Exceeding these values
may cause permanent device damage.
Functional operation should be restricted to the
limits in the DC Electrical Specifications table.
Exposure to absolute maximum ratings for
extended periods may affect device reliability.
©2003-2006 Peregrine Semiconductor Corp. All rights reserved.
Page 2 of 7
PE9304
Product Specification
Electrostatic Discharge (ESD) Precautions
When handling this UltraCMOS™ device, observe
the same precautions that you would use with
other ESD-sensitive devices. Although this device
contains circuitry to protect it from damage due to
ESD, precautions should be taken to avoid
exceeding the rating specified in Table 3.
Latch-Up Avoidance
Unlike conventional CMOS devices, UltraCMOS™
devices are immune to latch-up.
Device Functional Considerations
The PE9304 divides a 1000 MHz – 7000 MHz
input signal by a factor of two thereby producing
an output frequency at half the input frequency. To
work properly at higher frequencies, the input and
output signals (pins 2 & 7) must be AC coupled
via an external capacitor, as shown in the test
circuit in Figure 5.
The ground pattern on the board should be made
as wide as possible to minimize ground
impedance.
Document No. 70-0152-02 │ UltraCMOS™ RFIC Solutions