PE3340 Datasheet, PDF (10/12 Pages) Peregrine Semiconductor Corp. – 3.0 GHz Integer-N PLL for Low Phase Noise Applications

Figure 5. Package Drawing
20-lead TSSOP (JEDEC MO-153-AC)
TOP VIEW
0.65BSC
20 19
18 17 16 15 14 13 12 11
3.20 2X
Ø1.00±0.10
4.40±0.10
1.00
1 2 3 4 5 6 7 8 9 10
1.00
0.325
-B-
.20 C B A
-A-
6.50±0.10
0.10 C
0.30 MAX
0.10 C B A
FRONT VIEW
0.90±0.05
1.10 MAX
-C-
0.10±0.05
PE3340
Advance Information
12^o REF
0.20
R 0.90 MIN
GAGE
PLANE
0.25
12^o REF
R 0.90 MIN
0^o
8^o
0.60
+.15
-.10
1.0 REF
6.40
SIDE VIEW
Copyright © Peregrine Semiconductor Corp. 2004
Page 10 of 12
File No. 70/0040~02A| UTSi ® CMOS RFIC SOLUTIONS