MN89201 Datasheet, PDF (6/11 Pages) Panasonic Semiconductor – VGA-NTSC Scan Converter

MN89201
Pin Descriptions (continued)
Pin No.
Symbol
I/O
36
MODST
I
37
MEMOUT7/
O
SYNCINF
38
MEMOUT
O
41 to 46
[6:0]
49
OSXIN
I
50
XOO
O
53
OEOP
O
54
OEON
O
57
RD2CLK
O
58
XHSYNC
O
59
XVSYNC
O
60
XBLANK
O
61
XENRST
O
62
RDCLK
O
For Information Equipment
Function Description
This pin selects the output signal to the monitor pin, MEMOUT7
(pin 37).
"H" level: Pin 37 (normally "H" level) indicates the phase informa-
tion of VSYNC signal in VGA when the MN89201 is in
synchronization.
Note: At the time when RESET (pin 23) or SXRST
(pin 33) is driven (turned-ON or -OFF), the inner
counter of the MN89201 begins to operate in phase
with H and VSYNC of VGA. So, the phase shift in
VGA after synchronization can cause wrong
display. In this case you should survey the phase
information in synchronization that is outputted
from this pin, and detect the phase variation of the
synchronous signal in VGA, then give RESET or
SXRST to the MN89201.
"L" level: Test signal output.
If the MODST pin (pin 36) is "H" level, this pin indicates phase
information in synchronization of internal counters and VGA
synchronizing signals.
If pin 36 is "L" level, this pin is output for a test. Should be left open
usually.
Test pin
Normally leave this pin open.
External oscillator input pin
If an external oscillator is not used, drive this pin at "L" level.
External oscillator output pin
Internal PLL comparator result signal
Internal PLL comparator result signal
This data clock is half the frequency of RDCLK, has the same
frequency as the clock for Y, Cr, and Cb outputs.
The XHSYNC, XVSYNC, and XBLANK signals have a retiming at
the rising edge of this clock signal.
Horizontal synchronizing output signal (Active "L")
Vertical synchronizing output signal (Active "L")
Composite blanking output signal (Active "L")
Encoder reset signal (Active "L")
This signal has four fields interval (when both H and V are at "L"
level.) Use it as necessary to control the NTSC encoder.
Encoder clock
Y, Cr, and Cb outputs to the NTSC encoder are synchronized with
the rising edge of this clock signal.