MN3880S Datasheet, PDF (4/6 Pages) Panasonic Semiconductor – NTSC CCD Video Signal Delay Element

MN3880S
Application Circuit Example
10µF
–+
0.1µF
CCD Delay Line Series
(0.01µF)
VINC ¹⁶
(0.01µF)
Bias circuit
Charge input
block
CCD 454 stages
Charge
Resampling
2 _VOC
detection block ^{output amplifier}
øS driver
ø1 driver
ø2 driver
øR driver
øSH driver
øSH driver
Timing adjustment
XI ¹³ _{Waveform amplitude}
adjustment block
1000pF
Timing adjustment
øS driver
ø1 driver
ø2 driver
øR driver
øSH driver
øSH driver
VINY 9
–+
0.47µF
Clamp circuit
Charge input
block
CCD 454 stages
Charge
detection block
Resampling
7 VOY
output amplifier
(0.01µF)
(0.01µF)
Note: If the external capacitor attached to pin 5 is an electrolytic capacitor, attach the negative pole to pin 5.
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