MN38663S Datasheet, PDF (3/6 Pages) Panasonic Semiconductor – NTSC-Compatible CCD Video Signal Delay Element

CCD Delay Line Series
MN38663S
Pin Descriptions
Pin No. Symbol
1
XIC
2
V_SS3
3
V_DD3
4
VINC1
5
N.C.
6
VINVC
7
VGC1
8
VO1C
Pin Name
9.545454 MHz clock input
GND (3)
Power supply (3)
Camera signal input (1)
No connection
Video signal input (C)
Output gate connection (1)
Signal output (1C)
9
V_DD1
Power supply (1)
10
V_SS1
GND (1)
11
VO2Y
Signal output (2Y)
12
VGC2
Output gate connection (2)
13
VINC2
Power supply (2)
14
SW
Camera/video mode switch
15
VINVY
Video signal input (Y)
16
V_DD2
Power supply (2)
17
V_SS2
GND (2)
18
–V_BB
Substrate connection
19 PCOUT&VCOIN Phase comparator output and voltage controlled
oscillator input
20
XIV
3.579545 MHz clock input
Notes
1: Always connect V_DD1, V_DD2, and V_DD3 to the same voltage.
2: Always connect V_SS1, V_SS2, and V_SS3 to ground.
Function Description
Ground for clock multiplier circuit
Power supply for clock
multiplier circuit
Output pin for signal fed
to pin 4 or pin 6
Power supply for analog circuits
Ground for analog circuits
Output pin for signal fed
to pin 13 or pin 15
Power supply for digital circuits
other than frequency multiplier
Ground for digital circuits other
than frequency multiplier
Negative voltage pin
3