XN1872 Datasheet, PDF (2/2 Pages) Panasonic Semiconductor – Silicon N-channel . Enhancement MOS FET

Composite Transistors
P_T — Ta
500
400
300
200
100
0
0
40
80
120
160
Ambient temperature Ta (˚C)
| Y_fs | — V_DS
50
VDS=5V
Ta=25˚C
40
30
20
10
0
0
2
4
6
8
10
Drain to source voltage VDS (V)
1000
300
100
V_IN — I_O
VO=1V
Ta=25˚C
30
10
3
1
0.3
0.1
0.1 0.3 1 3 10 30 100
Output current IO (mA)
I_D — V_DS
120
Ta=25˚C
100
VGS=6.0V
80
5.5V
5.0V
60
4.5V
40
4.0V
20
3.5V
3.0V
0
0
2
4
6
8
10
Drain to source voltage VDS (V)
C_iss, C_oss — V_DS
12
VGS=0
f=1MHz
Ta=25˚C
10
Ciss
8
6
4
Coss
2
0
0.1 0.3 1 3 10 30 100
Drain to source voltage VDS (V)
XN1872
I_D — V_GS
120
VDS=5V
100
80
Ta= – 25˚C
25˚C
60
75˚C
40
20
0
0
2
4
6
8
10
Gate to source voltage VGS (V)
R_DS(ON) — V_GS
120
ID=20mA
100
80
60
Ta=75˚C
40
25˚C
– 25˚C
20
0
0
2
4
6
8
10
Gate to source voltage VGS (V)
2