MN38662S Datasheet, PDF (2/4 Pages) Panasonic Semiconductor – NTSC-Compatible CCD Video Signal Delay Element

MN38662S
Block Diagram
CCD Delay Line Series
Bias circuit
Clamp
circuit
Mode switch
Booster
circuit
Voltage
generator
VINVC ⁶
L
H
VINC1 ⁴
H
L
15
L
VINVY
H
13
H
VINC2
L
XIV ^{20 L}
H
Waveform
1 ^amplifier
XIC
adjustment
block
LH
Phase
comparator
Charge
input
block
79-stage
analog
shift
register
Charge
input
block
3-stage
analog
shift
register
Charge
input
block
3-stage
analog
shift
register
Charge
input
block
79-stage
analog
shift
register
H
L
H
602-stage
analog
shift
register
L
H
L
H
602-stage
analog
shift
register
L
H
Charge
detector
Charge
detector
1/3rd
L
frequency
divider
Waveform
adjustment
block
ø1 driver
VCO
Timing
adjustment
L
H
V_SS
ø2 driver
Voltage
generator
Resampling
output amplifier
Resampling
output amplifier
øS driver
øR driver
øSH driver
Substrate bias
generator
8
VO1C
11
VO2Y
2