MN101D10F Datasheet, PDF (2/5 Pages) Panasonic Semiconductor – MN101D10F

MN101D10F, MN101D10G
OSD
XDS
ROM Correction
I/O Pins
A/D Inputs
PWM
I/O
Input
ICR
OCR
Special Ports
Notes
Display mode
:
Applicable broadcasting system :
Screen configuration
:
Character type
:
Character size
:
Enlarged characters
:
Character interpolation
:
Line background color
:
Line background intensity
:
Screen background color :
:
Character color
:
Character intensity
:
Border function
:
Border brightness
:
Blinking
:
Inverted character
:
Halftone
:
Input
:
Clamp method
:
Output
:
Measure against image fluctuation :
Dot clock
:
MESECAM compatibility
:
menu(intermal synchronized) display, superimpose(externally synchronized) display
NTSC, PAL, PAL-M, PAL-N
24 characters × 2n rows (n = 1 to 6)
max. 256 character types (variable, include special characters)
12 × 18 dots (vertical direction: 1 dot for 2H at not enlargement)
each × 2 settings in horizontal and vertical
none
8-hue settable in the row unit at menu display
8 gradations settable in the row unit
8-huesettable at menu display
white
8 gradations settable in the row unit
1-dot border in 8 directions
4 gradations settable in the row unit
none (covered by software)
settable in the character unit
none
composite video signal input (output level: 1 V[p-p] / 2 V[p-p])
sync tip clamp, clamp level in 4 levels
composite video output
built-in AFC circuit
1/2 of OSC oscillation clock (automatic phase adjustment)
Subcarrier leak function for superimpose display
Built-in U.S. closed caption data slicer (optional 1 line data can be extracted.)
Correcting address designation: up to 3 addresses possible
Correction method: correction program being saved in internal RAM
76 • Common use: 56
1 • Common use: 1
8-bit × 12-ch. (without S/H)
13-bit × 2-ch. (at repetition cycle 572 µs at 14.32 MHz),
8-bit × 1-ch. (at repetition cycle 35.7 µs, 0.572 ms, 1.14 ms, 2.29 ms at 14.32 MHz)
16-bit × 2-ch.(Speed system),
18-bit × 4-ch.(Phase system)
16-bit × 3 (Synchronous output × 2, Rec CTL × 1 )
3-state output (PTO) VLP pin; CTL input;Capstan FG input; Cylinder(Drum) PG/FG inputs; HSW output;
Head amp/ Rotary outputs; built-in FG amp; output of 1/4 OSC oscillation clock (1 V[p-p])
MAD00043BEM
See the next page for electrical characteristics, pin assignment and support tool.