MN101D10F Datasheet, PDF (1/5 Pages) Panasonic Semiconductor – MN101D10F

MN101D10F , MN101D10G
Type
ROM (× 8-bit)
RAM (× 8-bit)
Package
Minimum Instruction
Execution Time
Interrupts
Timer Counter
Serial Interface
MN101D10F
MN101D10G
96 K
128 K
2.5 K
3.5 K
With main clock operated
When sub-clock operated
QFP100-P-1818B ^*Lead-free
0.1397 µs (at 4.0 V to 5.5 V, 14.32 MHz)
71.5 µs (at 2.7 V to 5.5 V fixed to 14.32 MHz internal frequency division)
61 µs (at 2.5 V to 5.5 V, 32.768 kHz)
• RESET • Runaway • External 0 • External 1 • External 2 • External 3 • External 4
• Timer 0 • Timer 1 • Timer 2 • Timer 3 • Timer 6 • Capstan FG • Control • HSW
• Cylinder(Drum) FG • Servo V-sync • Synchronous output • OSD • XDS • Serial 0
• Serial 1 • Serial 2 • PWM 4 • OSDV-sync
Timer counter 0: 8-bit × 1 (timer function)
Clock source ····················· 1/4, 1/16 of system clock frequency
Interrupt source ················· overflow of timer counter 0
Timer counter 1: 8-bit × 1 (timer function, linear timer counter function)
Clock source ····················· 1/4 of system clock frequency; CTL signal
Interrupt source ················· overflow of timer counter 1
Timer counter 2: 16-bit × 1 (timer function, input capture,duty judgment of CTL signal(VISS/VASS detection
function), generation of remote control output carrier frequency)
Clock source ····················· 1/4, 1/16, 1/24 of system clock frequency
Interrupt source ················· overflow of timer counter 2; input of CTL specified edge; underflow of timer 2
shift register 4-bit counter; coincidence of timer 2 shift register with timer 2 shift
register compare register
Timer counter 3: 16-bit × 1 (timer function, generation of serial transmission clock)
Clock source ····················· 1/4, 1/16 of system clock frequency
Interrupt source ················· overflow of timer counter 3
Timer counter 5: 19-bit × 1 (watchdog, stable oscillation waiting function)
Clock source ····················· system clock
Watchdog interrupt source ··· 1/2¹⁶, 1/2¹⁹ of timer counter 5 frequency
Clear by stable oscillation ··· after 256 counts by timer counter 5 (2¹⁸ counts of OSC oscillation clock)
Timer counter 6: 16-bit × 1 (clock function [max. 2 s])
Clock source ····················· 1/512 of OSC oscillation clock frequency; XI oscillation clock;
1/8, 1/128 of system clock frequency
Interrupt source ················· 1/2¹³, 1/2¹⁴, 1/2¹⁵ overflow of timer counter 6
Serial 0: 8-bit × 1 (synchronous type)
(transfer direction of MSB/LSB selectable, start condition function)
Clock source ····················· 1/8, 1/16, 1/32, 1/64, 1/128, 1/256 of system clock frequency; NSBT0 pin input
Serial 1: 8-bit × 1 (synchronous type/remote control transmission)
(transfer direction of MSB/LSB selectable, start condition function)
Clock source ····················· 1/8, 1/16, 1/32, 1/64, 1/128, 1/256 of system clock frequency; 2-division timer 3
output; NSBT1 pin input
Remote control clock ······· 2-division timer 3 output
Serial 2: 8-bit × 1 (I²C) (master transmission/reception, slave transmission/reception)
Clock source ····················· 1/144 to 1/252 of system clock; SCK pin input
MAD00043BEM