MN101C97 Datasheet, PDF (2/8 Pages) Panasonic Semiconductor – 8-bit Single-chip Microcontroller

MN101C97 Series
 Features
 ROM Size:
MN101C97D, MN101CF97D
MN101C97A
65536 × 8 bit
32768 × 8 bit
 RAM Size: 1024 × 8 bit
 Package:
TQFP48 (7mm square, 0.5mm pitch)
QFP44 (10mm square, 0.8mm pitch) *Under planning
 Machine Cycle:
<Mask ROM version MN101C97A / MN101C97D>
High speed mode <fs = fosc / 1>
0.125 ms / 8 MHz (2.7 V to 3.6 V)
0.250 ms / 4 MHz (1.8 V to 3.6 V)
High speed mode <fs = fosc / 2>
0.250 ms / 8 MHz (2.2 V to 3.6 V)
0.500 ms / 4 MHz (1.8 V to 3.6 V)
Low speed mode <fs = fx / 2>
62.5 ms / 32 kHz (1.8 V to 3.6 V)
<Flash EEPROM version MN101CF97D>
High speed mode <fs = fosc / 1>
0.250 ms / 4 MHz (2.2 V to 3.6 V)
0.270 ms / 3.7 MHz (2.0 V to 3.6 V)
0.500 ms / 2 MHz (1.8 V to 3.6 V)
High speed mode <fs = fosc / 2>
0.250 ms / 8 MHz (2.2 V to 3.6 V)
0.500 ms / 4 MHz (1.8 V to 3.6 V)
Low speed mode <fs = fx / 2>
62.5 ms / 32 kHz (1.8 V to 3.6 V)
 Clock Gear Circuit Embedded:
The operation speed of system clock can be changed by switching the dividing ratio of the oscillation clock.
(1, 2, 4, 8, 16, 32, 64, 128 dividing)
 Oscillation Circuit:
2 channels oscillation circuits (High-speed / Low-speed)
 Operation Modes:
NORMAL mode (High-speed mode)
SLOW mode (Low-speed mode)
HALT mode (High-speed / Low-speed mode)
STOP mode
The operation clock can be switched in each mode.
 ROM Correction:
Maximum of 3 parts in a program
 Operation Voltage: 1.8 V to 3.6 V
 Operation Temperature: -40°C to + 85°C
2
Ver. JEM