XN1871 Datasheet, PDF (1/2 Pages) Panasonic Semiconductor – Silicon N-channel junction FET

Composite Transistors
XN1871
Silicon N-channel junction FET
For amplification of the low frequency
s ^Features
q Two elements incorporated into one package.
(Soure-coupled FETs)
q Reduction of the mounting area and assembly cost by one half.
0.65±0.15
5
4
3
2.8
+0.2
-0.3
1.5
+0.25
-0.05
Unit: mm
0.65±0.15
1
2
s ^{Basic Part Number of Element}
q 2SK198 × 2 elements
s ^{Absolute Maximum Ratings (Ta=25˚C)}
Parameter
Symbol
Ratings
Unit
Drain to source voltage V_DSX
30
V
Rating _{Gate to drain voltage VGDO}
–30
V
of
element ^{Drain current}
I_D
20
mA
Gate current
I_G
10
mA
Total power dissipation
P_T
300
mW
Overall Channel temperature
T_ch
150
˚C
Storage temperature
T_stg
–55 to +150
˚C
0.1 to 0.3
0.4±0.2
1 : Gate (Tr1)
2 : Gate (Tr2)
3 : Drain (Tr2)
4 : Source
5 : Drain (Tr1)
EIAJ : SC–74A
Mini Type Pakage (5–pin)
Marking Symbol: 5T
Internal Connection
FET 1
5
1
4
3
2
FET 2
s ^{Electrical Characteristics (Ta=25˚C)}
Parameter
Symbol
Conditions
min
typ max Unit
Drain current
Gate cutoff current
Gate to source cutoff voltage
Mutual conductance
I_DSS
I_GSS
V_GSC
gm
gm
Common source short-circuit input capacitance C_iss
Common source reverse transfer capacitance C_rss
V_DS = 10V, V_GS = 0
0.5
12
mA
V_GS = –30V, V_DS = 0
–100 nA
V_DS = 10V, I_D = 10µA
– 0.1
–1.5
V
V_DS = 10V, I_D = 0.5mA, f = 1MHz
4
mS
V_DS = 10V, V_GS = 0V, f = 1MHz
4
12
mS
V_DS = 10V, V_GS = 0V, f = 1MHz
14
pF
V_DS = 10V, V_GS = 0V, f = 1MHz
3.5
pF
Noise voltage
NV
V_DS = 30V, I_D = 1mA, G_V = 80dB
Rg = 100kΩ, Function = FLAT
60
mV
1