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OX16PCI954 Datasheet, PDF (19/72 Pages) Oxford Semiconductor – Integrated Quad UART and PCI interface | |||
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OXFORD SEMICONDUCTOR LTD.
OX16PCI954
6.4.2 Multi-purpose I/O Configuration register âMICâ (Offset 0x04)
This register configures the operation of the multi-purpose I/O pins âMIO[11:0] as follows.
Bits
Description
1:0
MIO0 Configuration Register (Mode[1:0]â â01â).
00 -> MIO0 is a non-inverting input pin
01 -> MIO0 is an inverting input pin
10 -> MIO0 is an output pin driving â0â
11 -> MIO0 is an output pin driving â1â
Read/Write
EEPROM
PCI
W
RW
Unused (Mode[1:0]=â01â). When Parallel Port is enabled, MIO[0] pin is
unused and will remain in forcing output mode.
3:2
MIO1 Configuration Register (LCC[6:5]=â00â).
W
RW
00 -> MIO1 is a non-inverting input pin
01 -> MIO1 is an inverting input pin
10 -> MIO1 is an output pin driving â0â
11 -> MIO1 is an output pin driving â1â
Unused (LCC[6:5] â â00â). When power-down mode in Function0 is
enabled, MIO1 pin is unused and will remain in forcing output mode.
5:4
MIO2 Configuration Register (LCC[7]=â0â).
W
RW
00 -> MIO2 is a non-inverting input pin
01 -> MIO2 is an inverting input pin
10 -> MIO2 is output pin driving â0â
11 -> MIO2 is output pin driving â1â
PME_Input (LCC[7]=â1â). When LCC[7] is set, MIO2 pin is re-defined to
PME_Input. Itâs polarity will be controlled by MIC[4]. It sets the sticky
PME_Status bit in Function1.
7:6
MIO3 Configuration Register.
W
RW
00 -> MIO3 is a non-inverting input pin
01 -> MIO3 is an inverting input pin
10 -> MIO3 is an output pin driving â0â
11 -> MIO3 is an output pin driving â1â
9:8
MIO4 Configuration Register.
W
RW
00 -> MIO4 is a non-inverting input pin
01 -> MIO4 is an inverting input pin
10 -> MIO4 is an output pin driving â0â
11 -> MIO4 is an output pin driving â1â
11:10
MIO5 Configuration Register.
W
RW
00 -> MIO5 is a non-inverting input pin
01 -> MIO5 is an inverting input pin
10 -> MIO5 is an output pin driving â0â
11 -> MIO5 is an output pin driving â1â
13:12
MIO6 Configuration Register.
W
RW
00 -> MIO6 is a non-inverting input pin
01 -> MIO6 is an inverting input pin
10 -> MIO6 is an output pin driving â0â
11 -> MIO6 is an output pin driving â1â
15:14
MIO7 Configuration Register.
W
RW
00 -> MIO7 is a non-inverting input pin
01 -> MIO7 is an inverting input pin
10 -> MIO7 is an output pin driving â0â
11 -> MIO7 is an output pin driving â1â
Data Sheet Revision 1.3
Reset
00
00
00
00
00
00
00
00
Page 19
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