TRPBFELXTBOSH Datasheet, PDF (4/5 Pages) OPLINK Communications Inc. – Single Fiber Bi-Directional Fast Ethernet SFP Single Mode Transceivers

TRPBFELX
Example of SFP host board schematic
Vcc
3.3V
1µH coil or ferrite bead
(<0.2Ω series resistance)
+ ₁₀
0.1
TX Disable
TX DATA IN+
TX DATA IN-
0.1
+ ₁₀
0.1
50Ω line
50Ω line
16
2
8
15
4
5
TRPBFELX
3
6
18
13
19
12
1, 9,10,11,14,17,20
Vcc
3.3V
RR R R
TX Fault
LOS
MOD_DEF(2)
MOD_DEF(1)
50Ω line
50Ω line
MOD_DEF(0)
(Internally Grounded)
RX DATA OUT+
to 50Ω load
RX DATA OUT-
to 50Ω load
R: 4.7 to 10kΩ
Application Notes
Electrical interface: All signal interfaces are compliant with
the SFP MSA specification. The high speed DATA interface
is differential AC-coupled internally with 1µF and can be
directly connected to a 3.3V SERDES IC. All low speed
control and sense output signals are open collector TTL
compatible and should be pulled up with a 4.7 - 10kΩ
resistor on the host board.
Loss of Signal (LOS): The Loss of Signal circuit monitors
the level of the incoming optical signal and generates a logic
HIGH when an insufficient photocurrent is produced.
TX Fault: The output indicates LOW when the transmitter
is operating normally, and HIGH with a laser fault including
laser end-of-life. TX Fault is an open collector/drain output
and should be pulled up with a 4.7 - 10kΩ resistor on the
host board. TX Fault is non-latching (automatically
deasserts when fault goes away).
TX Disable: When the TX Disable pin is at logic HIGH,
the transmitter optical output is disabled (less than -45dBm).
Serial Identification: The module definition of SFP
is indicated by the three module definition pins,
MOD_DEF(0), MOD_DEF(1) and MOD_DEF(2). Upon
power up, MOD_DEF(1:2) appear as NC (no connection),
and MOD_DEF(0) is TTL LOW. When the host system
detects this condition, it activates the serial protocol
(standard two-wire I²C serial interface) and generates the
serial clock signal (SCL). The negative edge clocks data
from the SFP EEPROM.
The serial data signal (SDA) is for serial data transfer. The
host uses SDA in conjunction with SCL to mark the start
and end of serial protocol activation.
The data transfer protocol and the details of the mandatory
and vendor specific data structures are defined in the SFP
MSA. EEPROM ID is per SFF-8472, Rev. 9.4.
Power supply and grounding: The power supply line should
be well-filtered. All 0.1µF power supply bypass capacitors
should be as close to the transceiver module as possible.
4
21737-0911, Rev. B
06-23-2005