PCA9617A Datasheet, PDF (9/15 Pages) NXP Semiconductors – Level translating Fm+ I2C-bus repeater

PCA9617A
DC CHARACTERISTICS V_CC(A) = 0.8 V to 5.5 V (Note 7); V_CC(B) = 2.2 V to 5.5 V; GND = 0 V; T_A = −40°C to +85°C; unless
otherwise specified. Typical values measured with V_CC(A) = 0.95 V and V_CC(B) = 2.5 V at 25°C, unless otherwise noted.
T_A = −405C to +855C
T_A = −555C to
+1255C
Symbol
Parameter
Conditions
Min Typ
Max
Min
Max
Unit
SUPPLIES
I_CC(A)
I_CCH(B)
I_CCL(B)
Supply Current Port A
Port B HIGH−Level
Supply Current
Port B LOW−Level
Supply Current
V_CC(A) = 0.95 V
V_CC(A) = 5.5V
V_CC(B) = 5.5 V;
SDAn = SCLn = V_CC(n)
V_CC(B) = 5.5 V;
One SDA and SCL = GND;
8
50
1.5
2.1
1.51
2.1
8
mA
50
2.1
mA
2.1
mA
Other SDA and SCL Open
(with pull−up resistors)
INPUT / OUTPUT SDAB, SCLB
V_IH
V_IL
(Note 7)
High−Level Input
Voltage
Low−Level Input
Voltage
0.7 x
V_CC(B)
0.7 x
V_CC(B)
V
+0.4
+0.4
V
V_IK
Input Clamping
Voltage
I_I = −18 mA
−1.2
−0.3
−1.2
−0.3
V
V_OL
LOW−Level Output
Voltage
I_OL = 150 mA; V_CC(B) = 2.2 V
(Note 8)
0.425
0.425
I_OL = 13 mA; V_CC(B) = 2.2 V
(Note 9)
0.54
0.639
V
0.639
V_OL − V_IL
(Note 8)
Difference between
LOW−Level Output
and LOW−Level Input
Voltage
V_OL at I_OL = 1 mA;
Guaranteed by design
60
90
160
60
160
mV
I_LI
Input Leakage Current
V_I = 5.5 V
I_IL
LOW−Level Input
Current
SDA, SCL, V_I = 0.2 V
±1
±1
mA
10
10
mA
C_I/O
Input/Output
Capacitance
INPUT / OUTPUT SDAA, SCLA
V_I = 3 V or 0 V;
V_CC(B) = 3.3 V; EN = Low
V_I = 3 V or 0 V; V_CC = 0 V
7
10
7
10
10
pF
10
V_IH
High−Level Input
Voltage
V_IL
Low−Level Input
(Note 10) Voltage
0.7 x
V_CC(A)
0.7 x
V_CC(A)
V
0.25 x
V_CC(A)
(Note 11)
0.25 x
V_CC(A)
V
(Note 11)
V_IK
Input Clamping
Voltage
I_I = −18 mA
−1.2
−0.3
−1.2
−0.3
V
V_OL
LOW−Level Output
Voltage
I_OL = 13 mA; V_CC(B) = 2.2 V
0.1
0.2
0.2
V
7. V_CC(A) may be as high as 5.5 V for overvoltage tolerance but 0.4 V_CC(A) + 0.8 V ≤ V_CC(B) for the channels to be enabled and functional
normally.
8. Pull−up should result in I_OL ≥ 150 mA.
9. Guaranteed by design and characterization.
10. V_IL for port A with envelope noise must be below 0.3 V_CC(A) for stable performance.
11. When V_CC(A) is less than 1 V, care is required to make certain that the system ground offset and noise are minimized such that there
is reasonable difference between the V_IL present at the PCA9617A A−side input and the 0.25 V_CC(A) input threshold.
12. Power supply decoupling capacitors need to be present for both V_CC(A) and V_CC(B) and the 0.1 mF decoupling for V_CC(B) needs to be
located near the V_CC(B) pin.
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