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NCP1083 Datasheet, PDF (9/17 Pages) ON Semiconductor – Integrated High Power PoE-PD Interface & DC-DC Converter Controller with 9V Auxiliary Supply Support
NCP1083
Table 3. Operating Conditions
Symbol
Parameter
PASS−SWITCH AND CURRENT LIMITS
Ron
Pass−switch Rds−on
I_Rinrush1
Rinrush = 150 kW (Note 11)
I_Rinrush2
Rinrush = 57.6 kW (Note 11)
I_Rilim1
Rilim1 = 84.5 kW (Note 11)
I_Rilim2
Rilim1 = 66.5 kW (Note 11)
I_Rilim3
Rilim1 = 55.6 kW (Note 11)
I_Rilim4
Rilim1 = 38.3 kW (Note 11)
INRUSH AND ILIM1 CURRENT LIMIT TRANSITION
Vds_pgood
VDS required for power good
status
Vds_pgood_hyst VDS hysteresis required for power
good status
VDDH REGULATOR
VDDH_reg
Regulator output voltage
(Notes 12 and 13)
VDDH_Off
Regulator turn−off voltage
VDDH_lim
VDDH regulator current limit
(Notes 12 and 13)
VDDH_Por_R
VDDH POR level (rising)
VDDH_Por_F
VDDH POR level (falling)
VDDH_ovlo
VDDH over−voltage level (rising)
VDDL REGULATOR
VDDL_reg
Regulator output voltage
(Notes 12 and 13)
Min. Typ. Max. Units
Conditions
−
0.6
1.2
W
Max Ron specified at Tj = 130°C
95
125
155
mA Measured at RTN−VPORTN1,2 = 3 V
260
310
360
mA Measured at RTN−VPORTN1,2 = 3 V
450
510
570
mA Current limit threshold
600
645
690
mA Current limit threshold
720
770
820
mA Current limit threshold
970 1100 1230 mA Current limit threshold
0.8
1
1.2
−
8.2
−
V
RTN−VPORTN1,2 falling; voltage
with respect to VPORTN1,2
V
Voltage with respect to VPORTN1,2
8.4
9
9.6
VDDH_reg + 0.5 V
13
−
26
7.3
−
8.3
6
−
7
16
−
18.5
V
Ivddh_load + Ivddl_load < 10 mA
with Ivddl_load < 2.25 mA and
12.5 V < VPORTP − ARTN < 57 V
V
For information only
mA
V
V
V
3.05
3.3
3.55
V
Ivddl_load < 2.25 mA with
Ivddh_load + Ivddl_load < 10 mA and
12.5 V < VPORTP − ARTN < 57 V
VDDL_Por_R
VDDL POR level (rising)
VDDL
−
VDDL
V
− 0.2
− 0.02
VDDL_Por_F
VDDL POR level (falling)
2.5
−
2.9
V
GATE DRIVER
Gate_Tr
GATE rise time (10−90%)
−
−
50
ns
Cload = 2 nF, VDDHreg = 9 V
Gate_Tf
GATE fall time (90−10%)
−
−
50
ns
Cload = 2 nF, VDDHreg = 9 V
PWM COMPARATOR
VCOMP
COMP control voltage range
1.3
−
3
V
For information only
ERROR AMPLIFIER
Vbg_fb
Reference voltage
1.15
1.2
1.25
V
Voltage with respect to ARTN
Av_ol
DC open loop gain
−
80
−
dB For information only
GBW
Error amplifier GBW
1
−
−
MHz For information only
11. The current value corresponds to the PoE−PD input current (the current flowing in the external Rdet and the quiescent current of the device
are included).
12. Power dissipation must be considered. Load on VDDH and VDDL must be limited especially if VDDH is not powered by an auxiliary winding.
13. Ivddl_load = current flowing out of the VDDL pin.
Ivddh_load = current flowing out of the VDDH pin + current delivered to the Gate Driver (function of the frequency, VDDH voltage & MOSFET
gate capacitance).
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