NCV7513 Datasheet, PDF (7/24 Pages) ON Semiconductor – FLEXMOS Hex Low−Side MOSFET Pre−Driver

NCV7513
ELECTRICAL CHARACTERISTICS (continued) (4.75 VvV_CCXv5.25 V, V_DD = V_CCX, −40°CvT_Jv125°C, unless otherwise
specified.) (Note 6)
Characteristic
Symbol
Conditions
Min
Typ
Max
Unit
Fault Detection – GAT_X OFF
DRN_X Diagnostic Current
DRN_X Fault Threshold Voltage
DRN_X Off State Bias Voltage
Gate Driver Outputs
GAT_X Output Resistance
GAT_X High Output Current
GAT_X Low Output Current
Turn−On Propagation Delay
Turn−Off Propagation Delay
Output Rise Time
Output Fall Time
I_SG
I_OL
V_SG
V_OL
V_CTR
Short to GND Detection,
V_DRNX = 0.30 V_CC1
Open Load Detection,
V_DRNX = 0.75 V_CC1
Short to GND Detection
Open Load Detection
−
t_P(ON)
t_P(OFF)
t_R
t_F
Output High or Low
V_GATX = 0 V
V_GATX = V_CC2
IN_X to GAT_X (Figure 4)
CSB to GAT_X (Figure 5)
IN_X to GAT_X (Figure 4)
CSB to GAT_X (Figure 5)
20% to 80% of V_CC2,
C_LOAD = 400 pF
(Figure 4, Note 5)
80% to 20% of V_CC2,
C_LOAD = 400 pF
(Figure 4, Note 5)
−27
−20
30
60
27
30
72
75
–
50
1.0
1.80
−5.25
–
1.9
–
–
–
–
–
–
–
−10
mA
80
mA
33
%V_CC1
78
%V_CC1
–
%V_CC1
2.5
kW
−1.9
mA
5.25
mA
ms
1.0
ms
1.0
1.40
ms
–
–
1.40
ms
Fault Timers
Channel Fault Blanking Timer
Channel Fault Filter Timer
Global Fault Refresh Timer
(Auto−retry Mode)
Timer Clock
t_BL(ON) V_DRNX = 5.0 V; IN_X rising to
30
FLTB falling (Figure 6)
t_BL(OFF) V_DRNX = 0 V; IN_X falling to
90
FLTB falling (Figure 6)
t_FF
Figure 7
7.0
t_FR
Register 2: Bit R₂ = 0 or R₅ = 0
7.5
Register 2: Bit R₂ = 1 or R₅ = 1
30
ENA1 = 1
–
45
60
ms
120
150
ms
12
17
ms
10
12.5
ms
40
50
ms
500
–
kHz
Serial Peripheral Interface (Figure 9) V_ccx = 5.0 V, V_DD = 3.3 V, F_SCLK = 4.0 MHz, C_LOAD = 200 pF
SO Supply Voltage
V_DD
3.3 V Interface
3.0
3.3
3.6
V
5.0 V Interface
4.5
5.0
5.5
V
SCLK Clock Period
−
–
250
–
ns
Maximum Input Capacitance
Sl, SCLK (Note 7)
–
–
12
pF
SCLK High Time
SCLK = 2.0 V to 2.0 V
125
–
–
ns
SCLK Low Time
SCLK = 0.8 V to 0.8 V
125
–
–
ns
Sl Setup Time
Sl = 0.8 V/2.0 V to
SCLK = 2.0 V (Note 7)
25
–
–
ns
Sl Hold Time
SCLK = 2.0 V to
Sl = 0.8 V/2.0 V (Note 7)
25
–
–
ns
6. Designed to meet these characteristics over the stated voltage and temperature recommended operating ranges, though may not be 100%
parametrically tested in production.
7. Guaranteed by design.
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