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NCV7513 Datasheet, PDF (20/24 Pages) ON Semiconductor – FLEXMOS Hex Low−Side MOSFET Pre−Driver
NCV7513
Short to GND/Open Load
Figure 20 illustrates turn−off with an open or high
resistance load when some capacitance is present at DRNX.
In the case of an open load, DRNX rises and settles to VCTR.
In the case of a high resistance load, DRNX may continue
to rise and may eventually settle to VLOAD.
The channel is commanded off. GATX goes low and the
timers are started. DRNX starts to rise and is below the VSG
threshold when the blanking time ends at “A”. A short to
GND fault is detected and captured by the fault latch, and
the FLTB flag is set.
DRNX continues to rise and as it passes through the VSG
threshold at “B”, the filter timer is triggered. At the end of
the filter time, the channel’s fault bits will indicate an
“open load” but because the latched data has not yet been
read, the data remains unchanged.
An SPI frame sent shortly after “B” returns data
indicating “short to GND” and the fault latch is updated at
“C” when CSB goes high. The next three frames sent after
“C” return data indicating an “open load”.
The STAB flag is reset at “D” as DRNX passes through
the VOL threshold. Note that the filter timer is not triggered
as DRNX passes from a fault state to a good state. The
channel’s fault bits will indicate “no fault” but because the
latched data has not yet been read, the data remains
unchanged.
The fault latch is updated at “E” when CSB goes high and
the FLTB flag remains reset. The next SPI frame sent
returns data indicating “no fault”.
1
INx
0
1
GATx
0
VLOAD
VOL
VCTR
VSG
0
1
STAB
0
BLANK 1
TIMER 0
FILTER 1
TIMER 0
FAULT 1
LATCH 0
1
CSB
0
1
SO
0
1
FLTB
0
D
AB
C
tBL(OFF)
tFF
INTERNAL
tFF
SIGNALS
E
00
10
01 01
01
00
00
10
01
01
01
00
Figure 20. Short to GND/Open Load
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