KAF-1603 Datasheet, PDF (7/21 Pages) ON Semiconductor – FULL FRAME CCD IMAGE SENSOR

KAF-1603 Image Sensor
Dark Reference Pixels
There are 4 light shielded pixels at the beginning of each line, and 12 at the end. There are 4 dark lines at the start of
every frame and 4 dark lines at the end of each frame. Under normal circumstances, these pixels do not respond to
light. However, dark reference pixels in close proximity to an active pixel can scavenge signal depending on light
intensity and wavelength and therefore will not represent the true dark signal.
Output Structure
Charge presented to the floating diffusion is converted into a voltage and current amplified in order to drive off-chip
loads. The resulting voltage change seen at the output is linearly related to the amount of charge placed on the
floating diffusion. Once the signal has been sampled by the system electronics, the reset gate (φR) is clocked to
remove the signal, and the floating diffusion is reset to the potential applied by Vrd (see Figure 3). More signal at the
floating diffusion reduces the voltage seen at the output pin. In order to activate the output structure, an off-chip load
must be added to the Vout pin of the device such as shown in Figure 4.
Dummy Pixels
Within the horizontal shift register are 10 leading additional pixels that are not associated with a column of pixels
within the vertical register. These pixels contain only horizontal shift register dark current signal and do not respond
to light. A few leading dummy pixels may scavenge false signal depending on operating conditions. There are two
more dummy pixels at the end of each line
IMAGE ACQUISITION
An electronic representation of an image is formed when incident photons falling on the sensor plane create electron-
hole pairs within the sensor. These photon-induced electrons are collected locally by the formation of potential wells
at each photogate or pixel site. The number of electrons collected is linearly dependent on light level and exposure
time and non-linearly dependent on wavelength. When the pixel's capacity is reached, excess electrons will leak into
the adjacent pixels within the same column. This is termed blooming. During the integration period, the φV1 and φV2
register clocks are held at a constant (low) level, and the sensor is illuminated. See Figure 8. The sensor must be
illuminated only during the integration period. Light must not reach the sensor during the time the image is read out.
This is usually accomplished with the use of a mechanical shutter or a pulsed light source.
CHARGE TRANSPORT
Referring to Figure 9, the integrated charge from each photogate is transported to the output using a two-step
process. During this readout time, the sensor needs to be protected from all light through the use of a shutter or
pulsed light source. Each line (row) of charge is first moved from the vertical CCD to the horizontal CCD register using
the φV1 and φV2 register clocks. The horizontal CCD is presented a new line on the falling edge of φV2 while φH1 is
held high. The horizontal CCD then transports each line, pixel by pixel, to the output structure by alternately clocking
the φH1 and φH2 pins in a complementary fashion. On each falling edge of φH2 a new charge packet is transferred
onto a floating diffusion and sensed by the output amplifier.
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Revision 1.1 PS-0036 Pg 7