CM1225 Datasheet, PDF (7/11 Pages) ON Semiconductor – 4-Channel Low Capacitance ESD Protection Arrays

4-Channel Low Capacitance ESD
Protection Arrays
CM1225
Application Information
Design Considerations
As a general rule, the CM1225 ESD protection array should be located as close as possible to the point of
entry of expected electrostatic discharges. Use minimum PCB trace lengths to ground planes and between the
signal input and the ESD devices.
Additional Information
See also California Micro Devices Application Note AP209, “Design Considerations for ESD Protection,” in the
Applications section at www.calmicro.com.
Figure 3. Typical HDMI ESD Protection with CM1225 Connection
©2010 SCILLC. All rights reserved.
April 2010 – Rev. 2
Publication Order Number:
CM1225/D