CAT5261_13 Datasheet, PDF (7/14 Pages) ON Semiconductor – Dual Digital Potentiometer (POT)

CAT5261
Table 11. RELIABILITY CHARACTERISTICS
Symbol
Parameter
Reference Test Method
Min
N_END (Note 11)
Endurance
MIL−STD−883, Test Method 1033
1,000,000
T_DR (Note 11)
Data Retention
MIL−STD−883, Test Method 1008
100
V_ZAP (Note 11)
ESD Susceptibility
MIL−STD−883, Test Method 3015
2000
I_LTH (Note 11)
Latch-up
JEDEC Standard 17
100
9. This parameter is tested initially and after a design or process change that affects the parameter.
10. t_PUR and t_PUW are delays required from the time V_CC is stable until the specified operation can be initiated.
11. This parameter is tested initially and after a design or process change that affects the parameter.
Max
Units
Cycles/Byte
Years
V
mA
V_IH
CS
V_IL
V_IH
SCK
V_IL
t_CSS
V_IH
SI
V_IL
V_OH
SO
V_OL
HI−Z
t_WH
t_SU
t_H
VALID IN
t_CS
t_CSH
t_WL
t_RI
t_FI
t_V
t_HO
t_DIS
HI−Z
Figure 2. Synchronous Data Timing
NOTE: Dashed Line = mode (1, 1)
CS
SCK
HOLD
SO
t_CD
t_CD
t_HD
t_HZ
t_HD
HIGH IMPEDANCE
t_LZ
Figure 3. HOLD Timing
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