ADT7473 Datasheet, PDF (61/74 Pages) Analog Devices – dBCool Remote Thermal Monitor and Fan Controller

ADT7473
Table 27. Register 0x42 — Interrupt Status Register 2 (Power−On Default = 0x00)
Bit No.
[0]
[1]
[2]
Mnemonic
RES
THERM
Limit Latch
OVT
FAN1
R/W
Read−only
Read−only
Read−only
Description
Reserved on the ADT7473.
On the ADT7473−1, THERM Limit Latch = 1 indicates Remote Channel 2 latch. This is a
THERM limit condition.
OVT = 1 indicates one of the THERM overtemperature limits is exceeded. This bit is cleared
on a read of the status register when the temperature drops below THERM – T_HYST.
FAN1 = 1 indicates Fan 1 has dropped below minimum speed or has stalled. This bit is not
set when the PWM1 output is off.
[3]
FAN2
Read−only FAN2 = 1 indicates Fan 2 has dropped below minimum speed or has stalled. This bit is not
set when the PWM2 output is off.
[4]
FAN3
Read−only FAN3 = 1 indicates Fan 3 has dropped below minimum speed or has stalled. This bit is not
set when the PWM3 output is off.
[5]
F4P
Read−only F4P = 1 indicates Fan 4 has dropped below minimum speed or has stalled. This bit is not set
when the PWM3 output is off.
R/W
When Pin 9 is programmed as a GPIO output, writing to this bit determines the logic output of
the GPIO.
Read−only
If Pin 9 is configured as the THERM timer input for THERM monitoring, then this bit is set
when the THERM assertion time exceeds the limit programmed in the THERM timer limit
register (Reg. 0x7A).
[6]
D1
Read−only D1 = 1 indicates either an open or short circuit on the Thermal Diode 1 inputs.
[7]
D2
Read−only D2 = 1 indicates either an open or short circuit on the Thermal Diode 2 inputs.
Table 28. Voltage Limit Registers (Note 1)
Register Address
R/W
Description (Note 2)
Power−On Default
0x46
R/W
V_CCP low limit.
0x00
0x47
R/W
V_CCP high limit.
0xFF
0x48
R/W
V_CC low limit.
0x00
0x49
R/W
V_CC high limit.
0xFF
1. Setting the Configuration Register 1 lock bit has no effect on these registers.
2. High limits: an interrupt is generated when a value exceeds its high limit (> comparison). Low limits: an interrupt is generated when a value
is equal to or below its low limit (≤ comparison).
Table 29. Temperature Limit Registers (Note 1)
Register Address
R/W
Description (Note 2)
Power−On Default
0x4E
R/W
Remote 1 temperature low limit.
0x01
0x4F
R/W
Remote 1 temperature high limit.
0xFF
0x50
R/W
Local temperature low limit.
0x01
0x51
R/W
Local temperature high limit.
0xFF
0x52
R/W
Remote 2 temperature low limit.
0x01
0x53
R/W
Remote 2 temperature high limit.
0xFF
1. Exceeding any of these temperature limits by 1°C causes the appropriate status bit to be set in the interrupt status register. Setting the
Configuration Register 1 lock bit has no effect on these registers.
2. High limits: an interrupt is generated when a value exceeds its high limit (> comparison). Low limits: an interrupt is generated when a value
is equal to or below its low limit (≤ comparison).
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