MC74LVX259 Datasheet, PDF (6/11 Pages) ON Semiconductor – 8-Bit Addressable Latch/1-of-8 Decoder CMOS Logic Level Shifter

MC74LVX259
TIMING REQUIREMENTS Input t_r = t_f = 3.0 ns
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _Symbol
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ t_w
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _tsu
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _th
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ^{tr, tf}
Parameter
Minimum Pulse Width,
Reset or Enable
(Figure 8)
Minimum Setup Time,
Address or Data to Enable
(Figure 8)
Minimum Hold Time,
Enable to Address or Data
(Figure 7 or 8)
Maximum Input,
Rise and Fall Times
(Figure 5)
Test Conditions
V_CC = 2.7 V
V_CC = 3.3 V ± 0.3 V
V_CC = 2.7 V
V_CC = 3.3 V ± 0.3 V
V_CC = 2.7 V
V_CC = 3.3 V ± 0.3 V
V_CC = 2.7 V
V_CC = 3.3 V ± 0.3 V
T_A = 25°C
T_A = ≤ 85°C
Min Typ Max Min Max _Unit
4.5
5.0
ns
4.5
5.0
4.0
4.0
ns
3.0
3.0
2.0
2.0
ns
2.0
2.0
400
300
ns
300
300
V_CC
t_r
DATA
IN
t_PLH
50%
OUTPUT
Q
50%
DATA
t_f
IN
V_CC
ADDRESS
SELECT
50%
t_PHL
GND
50%
t_PHL
OUTPUT
Q
50%
t_PHL
GND
V_CC
GND
V_CC
GND
Figure 5. Switching Waveform
Figure 6. Switching Waveform
DATA IN
ENABLE
OUTPUT Q
t_w
50%
t_PHL
t_w
50%
50%
t_PHL
V_CC
GND
DATA IN
V_CC
RESET
GN
D
OUTPUT Q
t_w
50%
t_PHL
50%
V_CC
GND
V_CC
GND
Figure 7. Switching Waveform
Figure 8. Switching Waveform
DATA IN OR
ADDRESS
SELECT
ENABLE
50%
t_su
t_h(H)
50%
Figure 9. Switching Waveform
TEST POINT
V_CC
t_h(H)
GND
t_su
V_CC
OUTPUT
DEVICE
UNDER
TEST
C_L*
GND
*Includes all probe and jig capacitance
Figure 10. Test Circuit
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