NTD4969N_14 Datasheet, PDF (5/7 Pages) ON Semiconductor – Power MOSFET

NTD4969N
TYPICAL PERFORMANCE CURVES
1200
1100
1000
900
800
700
600
500
400
300
200
100
0
0
T_J = 25°C
V_GS = 0 V
C_iss
C_oss
C_rss
5
10
15
20
25
30
V_DS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 7. Capacitance Variation
1000
V_DD = 15 V
I_D = 15 A
V_GS = 10 V
100
10
t_f
t_d(off)
t_r
t_d(on)
1
1
10
100
R_G, GATE RESISTANCE (W)
Figure 9. Resistive Switching Time
Variation vs. Gate Resistance
1000
100
10 ms
10
100 ms
1 ms
1 0 V < V_GS < 10 V
Single Pulse
T_C = 25°C
0.1
RDS(on) LIMIT
THERMAL LIMIT
0.01
0.01
PACKAGE LIMIT
0.1
1
10 ms
dc
10
100
V_DS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
10
9
Q_T
8
7
6
5 _Qgs
Q_gd
4
3
I_D = 30 A
2
T_J = 25°C
1
V_DD = 15 V
V_GS = 10 A
0
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
Q_G, TOTAL GATE CHARGE (nC)
Figure 8. Gate−to−Source and Drain−to−Source
Voltage vs. Total Charge
30
V_GS = 0 V
25
20
T_J = 125°C
T_J = 25°C
15
10
5
0
0.4
0.5
0.6
0.7
0.8
0.9
1.0
V_SD, SOURCE−TO−DRAIN VOLTAGE (V)
Figure 10. Diode Forward Voltage vs. Current
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
25
I_D = 19 A
50
75
100
125
150
175
T_J, STARTING JUNCTION TEMPERATURE (°C)
Figure 12. Maximum Avalanche Energy vs.
Starting Junction Temperature
http://onsemi.com
5