MC74HC4051A_06 Datasheet, PDF (5/18 Pages) ON Semiconductor – Analog Multiplexers / Demultiplexers

MC74HC4051A, MC74HC4052A, MC74HC4053A
DC CHARACTERISTICS — Analog Section
Guaranteed Limit
Symbol
Parameter
R_on Maximum “ON” Resistance
Condition
V_in = V_IL or V_IH; V_IS = V_CC to
V_EE; I_S ≤ 2.0 mA
(Figures 1, 2)
V_CC V_EE −55 to 25°C ≤85°C ≤125°C Unit
4.5 0.0
190
4.5 − 4.5
120
6.0 − 6.0
100
240
280
W
150
170
125
140
V_in = V_IL or V_IH; V_IS = V_CC or
4.5
0.0
150
V_EE (Endpoints); I_S ≤ 2.0 mA 4.5 − 4.5
100
(Figures 1, 2)
6.0 − 6.0
80
190
230
125
140
100
115
DR_on
I_off
Maximum Difference in “ON”
Resistance Between Any Two
Channels in the Same Package
Maximum Off−Channel Leakage
Current, Any One Channel
V_in = V_IL or V_IH;
V_IS = 1/2 (V_CC − V_EE);
I_S ≤ 2.0 mA
V_in = V_IL or V_IH;
V_IO = V_CC − V_EE;
Switch Off (Figure 3)
4.5 0.0
30
4.5 − 4.5
12
6.0 − 6.0
10
6.0 − 6.0
0.1
35
40
W
15
18
12
14
mA
0.5
1.0
Maximum Off−ChannelHC4051A V_in = V_IL or V_IH;
Leakage Current,
HC4052A V_IO = V_CC − V_EE;
Common Channel HC4053A Switch Off (Figure 4)
6.0 − 6.0
0.2
6.0 − 6.0
0.1
6.0 − 6.0
0.1
2.0
4.0
1.0
2.0
1.0
2.0
I_on Maximum On−ChannelHC4051A V_in = V_IL or V_IH;
Leakage Current, HC4052A Switch−to−Switch =
Channel−to−Channel HC4053A V_CC − V_EE; (Figure 5)
AC CHARACTERISTICS (C_L = 50 pF, Input t_r = t_f = 6 ns)
Symbol
Parameter
6.0 − 6.0
0.2
6.0 − 6.0
0.1
6.0 − 6.0
0.1
2.0
4.0
mA
1.0
2.0
1.0
2.0
Guaranteed Limit
V_CC
V −55 to 25°C ≤85°C ≤125°C Unit
t_PLH,
t_PHL
Maximum Propagation Delay, Channel−Select to Analog Output
(Figure 9)
2.0
270
3.0
90
4.5
59
6.0
45
320
350
ns
110
125
79
85
65
75
t_PLH,
t_PHL
Maximum Propagation Delay, Analog Input to Analog Output
(Figure 10)
2.0
40
3.0
25
4.5
12
6.0
10
60
70
ns
30
32
15
18
13
15
t_PLZ,
t_PHZ
Maximum Propagation Delay, Enable to Analog Output
(Figure 11)
2.0
160
3.0
70
4.5
48
6.0
39
200
220
ns
95
110
63
76
55
63
t_PZL,
t_PZH
Maximum Propagation Delay, Enable to Analog Output
(Figure 11)
2.0
245
3.0
115
4.5
49
6.0
39
315
345
ns
145
155
69
83
58
67
C_in Maximum Input Capacitance, Channel−Select or Enable Inputs
C_I/O Maximum Capacitance
Analog I/O
(All Switches Off)
Common O/I: HC4051A
HC4052A
HC4053A
10
10
10
pF
35
35
35
pF
130
130
130
80
80
80
50
50
50
Feedthrough
1.0
1.0
1.0
NOTE: For propagation delays with loads other than 50 pF, and information on typical parametric values, see Chapter 2 of the ON
Semiconductor High−Speed CMOS Data Book (DL129/D)
Typical @ 25°C, V_CC = 5.0 V, V_EE = 0 V
C_PD Power Dissipation Capacitance (Figure 13)*
HC4051A
45
pF
HC4052A
80
HC4053A
45
* Used to determine the no−load dynamic power consumption: P_D = C_PD V_CC2f + I_CC V_CC. For load considerations, see Chapter 2 of the
ON Semiconductor High−Speed CMOS Data Book (DL129/D).
http://onsemi.com
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