CS1088 Datasheet, PDF (5/8 Pages) ON Semiconductor – Vacuum Fluorescent Display Tube Driver

CS1088
GRID1 GRID2 GRID3 AN1 AN2 AN3
AN25 AN26 AN27 AN28 AN29 AN30 AN31
V_BB
GND
POR
V_REG
V_REG
GREN
V_REG
STB
V_REG
D_IN
V_REG
CLK
V_REG
METAL MASK ROM
DQ
LE
DQ
LE
DQ
LE
DQ
LE
DQ
LE
DQ
LE
DQ
LE
DQ
LE
DQ
LE
DQ
LE
DQ DQ
LE
LE
DQ
LE
DQ
CLK
R
DQ
CLK
R
DQ
CLK
R
DQ
CLK
R
DQ
CLK
R
DQ
CLK
R
DQ
CLK
R
DQ
CLK
R
DQ
CLK
R
DQ
CLK
R
DQ
CLK
R
DQ
CLK
R
DQ
CLK
R
Output Drive Capability
Grid Outputs: 50 mA
AN24 – AN29: 20 mA
AN1 – AN23, AN30, AN31: 2.0 mA
Figure 2. Block Diagram
OPERATION DESCRIPTION
Upon the initial application of power, the power on reset
function will cause all of the anode and grid driver outputs
to be off and all shift register outputs to be set low. Data is
fed into the shift register through the D_IN pin at the rising
edge of the CLK input. Thirty four bits of data are capable
of being stored by the shift register. Once the desired pattern
is stored in the shift register, it can be transferred to the latch
by setting the STB input high. The output of each latch
drives its corresponding output stage. A logic high input to
the shift register/latch will cause the corresponding output
to turn on. A logic low input to the shift register/latch will
cause the corresponding output to turn off. Please note that
if the STB is held high, the outputs of the latch reflect the
outputs of the corresponding shift register bits and will
change if data is shifted in.
The three GRID outputs are gated by the GREN input.
When GREN is low, the GRID outputs are forced low
regardless of the state of the corresponding latch output.
When GREN is high, the GRID outputs correspond to the
state of their respective latch outputs. The anode outputs,
AN1 to AN31 are always enabled.
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