CAT25256LI-G Datasheet, PDF (5/20 Pages) ON Semiconductor – 256-Kb SPI Serial CMOS EEPROM

CAT25256
Table 8. A.C. CHARACTERISTICS – NEW PRODUCT (Rev E) (V_CC = 1.8 V to 5.5 V, T_A = −40°C to +85°C (Industrial) and
V_CC = 2.5 V to 5.5 V, T_A = −40°C to +125°C, unless otherwise specified.) (Note 11)
V_CC = 1.8 V − 5.5 V
−405C to +855C
V_CC = 2.5 V − 5.5 V
−405C to +1255C
V_CC = 4.5 V − 5.5 V
−405C to +855C
Symbol
Parameter
Min
Max
Min
Max
Min
f_SCK
Clock Frequency
DC
5
DC
10
DC
t_SU
Data Setup Time
20
10
5
t_H
Data Hold Time
20
10
5
t_WH
SCK High Time
75
40
20
t_WL
SCK Low Time
75
40
20
t_LZ
HOLD to Output Low Z
50
25
t_RI (Note 12) Input Rise Time
2
2
t_FI (Note 12) Input Fall Time
2
2
t_HD
HOLD Setup Time
0
0
0
t_CD
HOLD Hold Time
10
10
5
t_V
Output Valid from Clock Low
75
40
t_HO
Output Hold Time
0
0
0
t_DIS
Output Disable Time
50
20
t_HZ
HOLD to Output High Z
100
25
t_CS
CS High Time
80
40
20
t_CSS
CS Setup Time
30
30
15
t_CSH
CS Hold Time
30
30
20
t_CNS
CS Inactive Setup Time
20
20
15
t_CNH
CS Inactive Hold Time
20
20
15
t_WPS
WP Setup Time
10
10
10
t_WPH
WP Hold Time
10
10
10
t_WC (Note 13) Write Cycle Time
5
5
11. AC Test Conditions:
Input Pulse Voltages: 0.3 V_CC to 0.7 V_CC
Input rise and fall times: ≤ 10 ns
Input and output reference voltages: 0.5 V_CC
Output load: current source I_{OL max}/I_{OH max}; C_L = 30 pF
12. This parameter is tested initially and after a design or process change that affects the parameter.
13. t_WC is the time from the rising edge of CS after a valid write sequence to the end of the internal write cycle.
Max
Units
20
MHz
ns
ns
ns
ns
25
ns
2
ms
2
ms
ns
ns
20
ns
ns
20
ns
25
ns
ns
ns
ns
ns
ns
ns
ns
5
ms
Table 9. POWER−UP TIMING (Notes 12, 14)
Symbol
Parameter
Min
Max
t_PUR
Power−up to Read Operation
0.1
1
t_PUW
Power−up to Write Operation
0.1
1
14. t_PUR and t_PUW are the delays required from the time V_CC is stable until the specified operation can be initiated.
Units
ms
ms
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