CAT24C03 Datasheet, PDF (5/14 Pages) Catalyst Semiconductor – 2-Kb I2C CMOS Serial EEPROM with Partial Array Write Protection

CAT24C03, CAT24C05
SCL
SDA
START
CONDITION
STOP
CONDITION
Figure 2. START/STOP Conditions
1
0
1
0 A₂ A₁ A₀ R/W CAT24C03
1
0
1
0 A₂ A₁ a₈ R/W CAT24C05
Figure 3. Slave Address Bits
SCL FROM
MASTER
BUS RELEASE DELAY (TRANSMITTER)
1
8
BUS RELEASE DELAY
(RECEIVER)
9
DATA OUTPUT
FROM TRANSMITTER
DATA OUTPUT
FROM RECEIVER
START
ACK DELAY (v t_AA)
Figure 4. Acknowledge Timing
ACK SETUP (w t_SU:DAT)
t_F
t_HIGH
t_R
t_LOW
t_LOW
SCL
t_SU:STA
t_HD:STA
t_HD:DAT
t_SU:DAT
SDA IN
SDA OUT
t_AA
t_DH
Figure 5. Bus Timing
t_SU:STO
t_BUF
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