SCY99194 Datasheet, PDF (4/40 Pages) ON Semiconductor – Fixed Frequency Current Mode Controller

SCY99194
MAXIMUM RATINGS
Rating
Symbol
Value
Unit
DRV Maximum voltage on DRV pin
(pin 5) (Dc−Current self−limited if operated within the allowed range) (Note 1)
–0.3 to 20
V
±1000 (peak)
mA
V_CC
(pin 6)
HV
(pin 8)
V_CCPower Supply voltage, V_CC pin, continuous voltage
Power Supply voltage, V_CC pin, continuous voltage (Note 1)
Maximum voltage on HV pin
(Dc−Current self−limited if operated within the allowed range)
–0.3 to 28
V
±30 (peak)
mA
–0.3 to 500
V
±20
mA
V_max
Maximum voltage on low power pins (except pin 5, pin 6 and pin 8)
(Dc−Current self−limited if operated within the allowed range) (Note 1)
–0.3 to 10
V
±10 (peak)
mA
R_qJ−A
Thermal Resistance SOIC−7
Junction-to-Air, low conductivity PCB (Note 2)
Junction-to-Air, medium conductivity PCB (Note 3)
Junction-to-Air, high conductivity PCB (Note 4)
°C/W
162
147
115
R_qJ−C Thermal Resistance Junction−to−Case
T_JMAX Operating Junction Temperature
T_STRGMAX Storage Temperature Range
ESD Capability, HBM model (All pins except HV) per JEDEC Standard JESD22,
Method A114E
73
−40 to +150
−60 to +150
> 2000
°C/W
°C
°C
V
ESD Capability, Machine Model per JEDEC Standard JESD22, Method A115A
> 200
V
ESD Capability, Charged Device Model per JEDEC Standard JESD22, Method C101E
> 1000
V
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. This device contains latch-up protection and exceeds 100 mA per JEDEC Standard JESD78.
2. As mounted on a 80 x 100 x 1.5 mm FR4 substrate with a single layer of 50 mm² of 2 oz copper traces and heat spreading area. As specified
for a JEDEC 51-1 conductivity test PCB. Test conditions were under natural convection or zero air flow.
3. As mounted on a 80 x 100 x 1.5 mm FR4 substrate with a single layer of 100 mm² of 2 oz copper traces and heat spreading area. As specified
for a JEDEC 51-2 conductivity test PCB. Test conditions were under natural convection or zero air flow.
4. As mounted on a 80 x 100 x 1.5 mm FR4 substrate with a single layer of 650 mm² of 2 oz copper traces and heat spreading area. As specified
for a JEDEC 51-3 conductivity test PCB. Test conditions were under natural convection or zero air flow.
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