SCY99194 Datasheet, PDF (20/40 Pages) ON Semiconductor – Fixed Frequency Current Mode Controller

SCY99194
X2 Cap Discharge Feature
The X2 capacitor discharging feature is offered by usage
of the SCY99194. This feature save approx. 16 mW –
25 mW input power depending on the EMI filter X2
capacitors volume and it saves the external components
count as well. The discharge feature is ensured via the
start−up current source with a dedicated control circuitry for
this function.
There is used a dedicated structure called ac line unplug
detector inside the X2 capacitor discharge control circuitry.
See the Figure 45 for the block diagram for this structure and
Figures 46, 47 and 49 for the timing diagrams. The basic
idea of ac line unplug detector lies in comparison of the
direct sample of the high voltage obtained via the high
voltage sensing structure with the delayed sample of the high
voltage. The delayed signal is created by the sample & hold
structure.
The comparator used for the comparison of these signals
is without hysteresis inside. The resolution between the
slopes of the ac signal and dc signal is defined by the
sampling time T_SAMPLE and additional internal offset N_OS.
These parameters ensure the noise immunity as well. The
additional offset is added to the picture of the sampled HV
signal and its analog sum is stored in the C₁ storage
capacitor. If the voltage level of the HV sensing structure
output crosses this level the comparator CMP output signal
resets the detection timer and no dc signal is detected. The
additional offset N_OS can be measured as the V_HV(hyst) on
the HV pin. If the comparator output produces pulses it
means that the slope of input signal is higher than set
resolution level and the slope is positive. If the comparator
output produces the low level it means that the slope of input
signal is lower than set resolution level or the slope is
negative. There is used the detection timer which is reset by
any edge of the comparator output. It means if no edge
comes before the timer elapses there is present only dc signal
or signal with the small ac ripple at the HV pin. This type of
the ac detector detects only the positive slope, which fulfils
the requirements for the ac line presence detection.
In case of the dc signal presence on the high voltage input,
there are the direct sample of the high voltage obtained via
the high voltage sensing structure and the delayed sample of
the high voltage equivalent and the comparator produces the
low level signal during the presence of this signal. No edges
are present at the output of the comparator, that’s why the
detection timer is not reset and dc detect signal appears.
The minimum detectable slope by this ac detector is given
by the ration between the maximum hysteresis observed at
HV pin V_HV(hyst),max and the sampling time:
V_HV(hyst),max
S_min + _Tsample
(eq. 1)
Than it can be derived the relationship between the
minimum detectable slope and the amplitude and frequency
of the sinusoidal input voltage:
V_max
+
2
V_HV(hyst),max
@ p @ f @ T_sample
+
2
@
p
@
5
35 @
1
@
10^−3
(eq. 2)
+ 22.7 V
The minimum detectable AC RMS voltage is 16 V at
frequency 35 Hz, if the maximum hysteresis is 5 V and
sampling time is 1 ms.
The X2 capacitor discharge feature is available in any
controller operation mode to ensure this safety feature. The
detection timer is reused for the time limiting of the
discharge phase, to protect the device against overheating.
The discharging process is cyclic and continues until the ac
line is detected again or the voltage across the X2 capacitor
is lower than V_HV(min). This feature ensures to discharge
quite big X2 capacitors used in the input line filter to the safe
level. It is important to note that it is not allowed to
connect HV pin to any dc voltage due this feature. e.g.
directly to bulk capacitor.
During the HV sensing or X2 cap discharging the V_CC net
is kept above the V_CC(off) voltage by the Self−Supply in any
mode of device operation to supply the control circuitry.
During the discharge sequence device runs normally.
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