NTGS4111PT2G Datasheet, PDF (4/5 Pages) ON Semiconductor – Power MOSFET

NTGS4111P
TYPICAL PERFORMANCE CURVES (T_J = 25°C unless otherwise noted)
1400
1300
C_iss
1200 _Crss
1100
1000
900
800
700
600
500
400
300
200
C_oss
100
0
10
V_DS = 0 V V_GS = 0 V C_rss
5
0
5
−V_GS −V_DS
10 15
12
T_J = 25°C
10
8
V_DS
C_iss
6
20
QT
V_GS
10
4 ^QGS
Q_GD
2
I_D = −3.7 A
0
T_J = 25°C ₀
20 25 30 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
Q_g, TOTAL GATE CHARGE (nC)
−GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 7. Capacitance Variation
Figure 8. Gate−to−Source Voltage vs. Total
Gate Charge
100
10
100 ms
1
V_GS = −20 V
SINGLE PULSE
T_C = 25°C
0.1
R_DS(on) LIMIT
THERMAL LIMIT
PACKAGE LIMIT
0.01
0.1
1
10
1 ms
10 ms
dc
100
−V_DS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 9. Maximum Rated Forward Biased
Safe Operating Area
1
D = 0.5
0.2
0.1
0.1
0.05
0.02
0.01
0.01
10
V_GS = 0 V
T_J = 150°C
1
T_J = 100°C
T_J = 25°C
0.1
0.3
T_J = −55°C
0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1
−V_SD, SOURCE−TO−DRAIN VOLTAGE (VOLTS)
Figure 10. Diode Forward Voltage vs. Current
0.001
Single Pulse
0.0001
1E−07
1E−06
1E−05
1E−04 1E−03
1E−02
1E−01
t, TIME (s)
Figure 11. FET Thermal Response
1E+00
1E+01
1E+02 1E+03
http://onsemi.com
4