NCP1218 Datasheet, PDF (4/20 Pages) ON Semiconductor – PWM Controller with Adjustable Skip Level and External Latch Input

NCP1218
Table 1. PIN FUNCTION DESCRIPTION
Pin
Name
Description
1 Skip/Latch This pin provides a latch input to permanently disable the device under a fault condition. It also allows the user to
adjust the skip threshold. A resistor between this pin and GND provides noise immunity to the latch input and sets
the skip threshold. The voltage on this pin is determined by the combination of the internal voltage divider and the
external resistor to ground. The default skip threshold is 1.1 V (typical) if no external resistor is used. An internal
clamp prevents the skip level from increasing above 1.3 V if the Skip/latch pin is pulled high to latch the controller.
2
FB
The voltage on this pin is proportional to the output load on the converter. An internal resistor divider sets the
voltage on this pin above the regulation threshold (3 V) and an external optocoupler pulls the pin low to achieve
regulation. While the FB voltage is above its regulation threshold, the overload timer is enabled. If the overload
timer expires, the controller is latched. The converter enters skip mode if the FB voltage is below the skip
threshold.
3
CS
A voltage ramp proportional to the primary current is applied to this pin. The maximum current is reached once the
ramp voltage reaches 1 V (typical). A 100 mA (typical) current source provides ramp compensation. The amount of
ramp compensation is adjusted with a series resistor between the CS pin and the current sense resistor.
4
GND
Analog ground.
5
DRV
Main output of the PWM Controller. DRV has a source resistance of 12.6 W (typical) and a sink resistance of 6.7 W
(typical).
6
V_CC
Positive input supply. This pin connects to an external capacitor for energy storage. An internal current source
supplies current from the HV pin to this pin. Once the V_CC voltage reaches V_CC(on) (12.7 V typical), the current
source turns off and the DRV is enabled. The current source turns on once V_CC falls to V_CC(min) (9.9 V typical).
This mode of operation is known as dynamic self supply (DSS).
If the bias current consumption exceeds the startup current, and V_CC drops 0.5 V (typical) below V_CC(min) the con-
verter turns off and enters a double hiccup mode. If the V_CC voltage is below 0.67 V (typical) the startup current is
reduced to 200 mA (typical), reducing power dissipation.
8
HV
This is the input of the high voltage startup regulator and connects directly to the bulk voltage. A controlled current
source supplies current from this pin to the V_CC capacitor, eliminating the need for an external startup resistor. The
charge current is 12.8 mA (typical).
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