MC74VHC1GT125 Datasheet, PDF (4/8 Pages) ON Semiconductor – Noninverting Buffer / CMOS Logic Level Shifter with LSTTL-Compatible Inputs

MC74VHC1GT125
SWITCHING WAVEFORMS
50%
A
t_PLH
50% V_CC
Y
V_CC
GND
t_PHL
Figure 4. Switching Waveforms
OE
50%
t_PZL t_PLZ
Y
50% V_CC
t_PZH t_PHZ
Y
50% V_CC
Figure 5.
V_CC
GND
HIGH
IMPEDANCE
V_OL + 0.3V
V_OH − 0.3V
HIGH
IMPEDANCE
DEVICE
UNDER
TEST
TEST POINT
OUTPUT
C_L*
DEVICE
UNDER
TEST
TEST POINT
OUTPUT ^{1 kW}
C_L *
CONNECT TO V_CC WHEN
TESTING t_PLZ AND t_PZL.
CONNECT TO GND WHEN
TESTING t_PHZ AND t_PZH.
*Includes all probe and jig capacitance
Figure 6. Test Circuit
*Includes all probe and jig capacitance
Figure 7. Test Circuit
INPUT
Figure 8. Input Equivalent Circuit
DEVICE ORDERING INFORMATION
Device Nomenclature
Device
Order Number
Temp
Circuit Range
Device Package
Indicator Identifier Technology Function Suffix
Tape &
Reel
Suffix
Package Type
(Name/SOT#/
Common Name)
Tape and
Reel Size^†
MC74VHC1GT125DF1 MC
74
VHC1G
T125
DF
SC−88A / SOT−353 178 mm (7”)
1
/ SC−70
3000 Unit
MC74VHC1GT125DF2 MC
74
VHC1G
T125
DF
SC−88A / SOT−353 178 mm (7”)
2
/ SC−70
3000 Unit
MC74VHC1GT125DT1 MC
74
VHC1G
T125
DT
TSOPS / SOT−23 178 mm (7”)
1
/ SC−59
3000 Unit
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
http://onsemi.com
4